Serial Address Translation for CPU–GPU Memory Coherence
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Solution Overview
Problem
Conventional address translation services fail to provide GPU-specific optimizations and maintain memory security, leading to inefficiencies in memory coherence and management across CPU and GPU subsystems.
Innovation Solution
A serial address translation method is implemented, where GPUs translate virtual addresses to GPU physical addresses using their own page tables, and then send these to a CPU translation agent for further translation to system physical addresses, enabling bi-directional coherence and caching of system physical addresses in GPU caches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional address translation services are used, then memory security is maintained, but GPU-specific optimizations are lost and memory coherence efficiency deteriorates
Solution Approach 1:
The address translation process is segmented into two distinct stages: first, the GPU translates virtual addresses to GPU physical addresses using its own page tables; second, the CPU translation agent translates GPU physical addresses to system physical addresses. This segmentation allows each component to use its own optimization strategies while maintaining overall system coherence.
Solution Approach 2:
The CPU translation agent acts as an intermediary between the GPU's address translation system and the system memory. It receives address translation requests from the GPU, performs the necessary translation using CPU page tables, and returns the system physical address. This intermediary enables the GPU to maintain its own translation optimizations while still accessing system memory coherently.
2Productivity
If GPUs use their own page tables for address translation, then GPU-specific optimizations are enabled, but unambiguous memory views across CPU and GPU subsystems become difficult to maintain
Solution Approach 1:
The system implements a feedback mechanism where the CPU translation agent monitors and manages the GPU's address translation process. The CPU page tables serve as the authoritative source for system physical address mappings, and the CPU translation agent ensures that GPU page table translations are consistent with the system-wide memory view. This feedback loop maintains reliability while allowing GPU optimizations.
3Reliability
If serial address translation is implemented, then bi-directional coherence and caching are enabled, but translation overhead and system latency increase
Solution Approach 1:
The system performs preliminary address translation actions by maintaining CPU page tables that are pre-configured with system physical address mappings. When the GPU needs to access system memory, the CPU translation agent can quickly translate the GPU physical address to a system physical address using these pre-prepared page tables, reducing the latency of the translation process while ensuring coherence.
Data Source
AI summary
A first virtual address is translated into a first physical address using a first translation agent associated with a first I/O device of a system. The first physical address is associated with an address space of the first I/O device. A first address translation request is sent to a second translation agent associated with a CPU of the system. The first address translation request includes the first physical address. A first address translation response is received from the second translation agent. The second address translation response includes a second physical address. the second physical address is associated with an address space of the system.