Serial System Bus Abnormality Detection and Synchronization
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Solution Overview
Problem
When configuring a system bus for serial communication, existing technologies fail to ensure the reliability and fault tolerance among processing units, as high-speed operation often compromises the soundness and error handling compared to parallel buses.
Innovation Solution
A processing unit with an operation unit, synchronization unit, and conversion unit is connected through both serial and synchronization signal communication lines, where the operation unit detects abnormalities and notifies the synchronization unit, which transmits these notifications to other processing units, and the conversion unit switches between parallel and serial data transmission based on abnormal state notifications to ensure data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If serial communication is used for system bus to achieve high-speed operation, then speed is improved, but reliability deteriorates due to reduced soundness and error handling capability
Solution Approach 1:
The patent segments the communication function into two distinct channels: a synchronization signal communication line for transmitting control and status signals (including abnormality notifications), and a serial signal communication line for data transmission. This segmentation allows the system to maintain high-speed serial data communication while ensuring reliable control signal transmission, thereby resolving the contradiction between speed and reliability.
Solution Approach 2:
The synchronization unit acts as an intermediary between the operation unit and other processing units. It receives abnormality detection notifications from the operation unit, processes them, and transmits appropriate synchronization signals and abnormality notifications through the synchronization signal communication line. This intermediary mechanism ensures proper error handling and maintains system reliability while enabling high-speed serial communication.
2Speed
If dedicated LSI with high-speed clock and complicated logic is used for serial communication, then speed is improved, but device complexity increases and soundness is reduced
Solution Approach 1:
The patent combines the functions of parallel-to-serial conversion, data transmission, and synchronization signal generation into an integrated processing unit. The conversion unit handles parallel-to-serial conversion while the synchronization unit manages synchronization signals, and both work together within the same processing unit architecture. This integration reduces the need for separate dedicated LSI components with complicated logic, thereby reducing device complexity while maintaining high-speed communication capability.
Data Source
AI summary
A processing unit is connected to another processing unit through a system bus composed of serial signal communication line and synchronization signal communication line to be able to communicate therewith. When an operation unit detects abnormal state in the processing unit, the operation unit supplies notification of detection of the abnormal state to synchronization unit. The synchronization unit transmits the received detection notification of abnormal state to the other processing unit through the synchronization signal communication line. Conversion unit receives parallel communication data from the operation unit through important signal line instead of general signal line and converts the received parallel signal into serial signal to be transmitted to the other processing unit through the serial signal communication line, thereby soundness among processing units connected to the system bus is ensured when the system bus is configured to attain serial communication.