Serial Bus Bitrate Conversion for Mixed Parallel Data Streams
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Solution Overview
Problem
Existing serial data buses, such as M-PHY, require additional serializers and deserializers for different bitrates, increasing component costs and implementation complexities when communicating both high-speed and low-speed parallel bit streams.
Innovation Solution
A data transmitting circuit converts low-speed parallel bit streams into high-speed parallel bit streams based on a high-speed reference frequency, allowing serialization and deserialization without additional components, enabling communication over a high-speed serial bus.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional serializers and deserializers are used to communicate different bitrate parallel bit streams, then communication versatility is improved, but device complexity and component costs increase
Solution Approach 1:
The patent makes the serializer and deserializer universal by enabling them to handle both high-speed and low-speed parallel bit streams through a single interface. The data processing circuit converts low-speed parallel bit streams into high-speed parallel bit streams, allowing the same serializer/deserializer pair to process different bitrate data types, thereby eliminating the need for separate components for each bitrate and reducing overall device complexity while maintaining communication versatility
2Adaptability or versatility
If additional serializers and deserializers are used to communicate different bitrate parallel bit streams, then communication versatility is improved, but component costs increase
Solution Approach 1:
The patent reduces component costs by designing a universal serializer and deserializer that can process both high-speed and low-speed parallel bit streams. The data processing circuit performs bitrate conversion to adapt low-speed data to the high-speed interface, allowing a single instance of each serializer and deserializer to serve multiple data rate requirements, thereby reducing the total quantity of components needed and lowering overall system cost
3Device complexity
If low-speed parallel bit stream is directly serialized without conversion, then device complexity is reduced, but data transmission efficiency deteriorates
Solution Approach 1:
The patent changes the bitrate parameter of the parallel bit stream by using a data processing circuit to convert low-speed parallel bit streams into high-speed parallel bit streams before serialization. This parameter transformation allows the data to be transmitted at higher speeds through the serial interface, improving data transmission efficiency while maintaining relatively simple device architecture through the use of a single universal serializer/deserializer pair
Data Source
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AI summary
Aspects disclosed in the detailed description include communicating low-speed and high-speed parallel bit streams over a high-speed serial bus.In one aspect, a data transmitting circuit converts a low-speed parallel bit stream into a high-speed parallel bit stream and then serializes the converted high-speed parallel bit stream based on a high-speed reference frequency.In another aspect, a data receiving circuit recovers the low-speed parallel bit stream from the high-speed parallel bit stream if the low-speed parallel bit stream is determined to exist in the high-speed parallel bit stream. By serializing and deserializing the low-speed parallel bit stream based on the high-speed reference frequency, it is possible to communicate the high-speed parallel bit stream and the low-speed parallel bit stream over the high-speed serial bus without requiring additional serializers and deserializers, thus reducing component costs and implementation complexities in both the transmitting circuit and the receiving circuit.