Serial Bus Security via Control Module Message Verification

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Solution Overview

Problem

Shared serial bus infrastructure in server computer systems is vulnerable to covert channel and denial of service attacks, particularly due to spoofing attacks that exploit message structures with sender and recipient addresses.

Innovation Solution

A control module is implemented to monitor and manage communications on the serial bus, identifying suspect messages by verifying source and destination addresses, and initiating remediation actions such as message disruption or degating unruly servers to prevent unauthorized communication.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If servers share a common serial bus for communication, then device complexity and communication efficiency are improved, but security vulnerabilities increase due to spoofing attacks

Engineering Contradiction:
Improvecommunication infrastructureVSAvoidsecurity vulnerabilities
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The control module performs preliminary verification of message authenticity by checking source addresses and message integrity before processing communications on the shared serial bus. This preliminary action prevents spoofed messages from causing harm while maintaining the simplified shared bus architecture.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The control module acts as an intermediary between servers on the shared serial bus, intercepting and verifying messages to prevent spoofing attacks. It mediates communication by validating source addresses and disrupting suspicious messages while allowing legitimate traffic to pass through the shared infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If the control module monitors and verifies each message on the serial bus, then security against spoofing attacks is improved, but processing time and computational overhead increase

Engineering Contradiction:
Improvespoofing attack resistanceVSAvoidmessage processing time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The control module applies partial verification by checking only critical message fields (source address, destination address, and integrity) rather than analyzing entire message contents. This selective approach provides sufficient security against spoofing while minimizing processing time and computational overhead.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The control module changes verification parameters by using simple checksum validation and address matching rather than complex cryptographic verification. This parameter change maintains security against basic spoofing attacks while significantly reducing processing time compared to more rigorous verification methods.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If the control module disrupts suspect messages to prevent unauthorized communication, then system security is improved, but communication reliability may worsen due to false positives

Engineering Contradiction:
Improveunauthorized communication preventionVSAvoidcommunication reliability
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The control module uses feedback mechanisms by monitoring message patterns and adjusting its disruption decisions based on verified legitimate communication patterns. This feedback loop reduces false positives by learning from legitimate traffic while maintaining disruption of actual spoofed messages, balancing security with communication reliability.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9811660B2Securing a shared serial bus
Publication Date: 2017.11.07 LENOVO GLOBAL TECHNOLOGIES SWITZERLAND INTERNATIONAL GMBH
  • US9811660B2 patent drawing
  • US9811660B2 patent drawing
  • US9811660B2 patent drawing

AI summary

A method for securing a serial bus shared by a control module and one or more subordinate electronic devices, the serial bus having a protocol specifying that messages on the serial bus have a source address and a destination address. The method comprises examining, by one or more processors of the control module, each message appearing on the serial bus that was not originated by the control module; identifying, by one or more processors of the control module, a suspect message that satisfies one or more suspect message criteria. The method includes updating, by one or more processors of the control module, an event metric, and testing to determine whether a threshold has been exceeded; and in the event the threshold has not been exceeded, initiating, by one or more processors of the control module, a co-transmission sufficient to disrupt consumption of the suspect message by a subordinate device.