Serial Bus Header Checksum for Dynamic Stuff Bit Errors
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Solution Overview
Problem
Current serial bus systems, such as CAN FD, face challenges in detecting errors related to dynamic stuff bits, particularly class 3 and class 4 errors, which are not reliably detected by conventional CRC methods, leading to potential bit flips and incorrect frame length decoding, compromising error robustness and data integrity.
Innovation Solution
A user station for serial bus systems that includes a communication control device generating transmission signals with a header check sum, inserting inverse stuff bits after 5 identical bits, and using a predetermined starting value and polynomial for CRC computation to ensure high error detection reliability, thereby minimizing errors and eliminating the need for additional fields that reduce data rate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dynamic stuff bits are included in the CRC computation for CAN FD, then class 3 errors are detected with higher reliability, but class 4 errors (individual bit drop or insertion) are not detected and the system requires additional stuff bit count fields that reduce data rate
Solution Approach 1:
The patent changes the CRC computation parameters by using a non-zero starting value and a specific polynomial that ensures the intermediate result is never a zero vector. This parameter change enables detection of class 4 errors (individual bit drops or insertions) without requiring additional stuff bit count fields, thus maintaining high error detection reliability while preserving data transfer rate.
Solution Approach 2:
The patent extracts the stuff bit count field requirement from the system by using a modified CRC computation method. Instead of needing separate stuff bit count fields to track dynamic stuff bits, the modified CRC computation inherently detects errors related to stuff bits through its non-zero intermediate result property, eliminating the need for additional data overhead.
2Reliability
If conventional CRC computation is used for CAN, then class 1 errors (bit flips) are detected with sufficient probability, but class 3 errors (two bit flips affecting dynamic stuff conditions) are not reliably detected
Solution Approach 1:
The patent applies parameter changes to the CRC computation by modifying the starting value to be non-zero and selecting a specific polynomial that guarantees the intermediate result is never a zero vector. This enables detection of class 3 errors (two bit flips affecting dynamic stuff conditions) while maintaining the same basic CRC computation structure, thus not significantly increasing device complexity.
3Reliability
If header check sum is computed including dynamic stuff bits with non-zero starting value and specific polynomial, then class 4 errors are detected without requiring stuff bit count fields, but the CRC computation must be performed differently from conventional methods
Solution Approach 1:
The patent changes the CRC computation parameters (non-zero starting value, specific polynomial) to enable detection of class 4 errors. While the parameters change, the basic CRC computation architecture remains the same, making implementation feasible with moderate complexity increase rather than requiring completely new computation logic.
Data Source
AI summary
A user station for a serial bus system. The user station includes a communication control device for controlling a communication of the user station with at least one other user station, and a transceiver device to serially transmit a transmission signal generated by the communication control device onto a bus and to serially receive signals from the bus. The communication control device generates the transmission signal according to a frame, and inserts a header check sum into the frame, only bits of a frame header that is situated in front of a data field provided for useful data in the frame being included in the computation. For computing the header check sum, the communication control device uses a predetermined starting value and a predetermined check sum polynomial.