Serial Bus Interface Layout for IC Noise Isolation

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Solution Overview

Problem

High-speed serial transfer interfaces in integrated circuit devices, such as those used in portable telephones, face challenges with noise interference due to the proximity of the physical layer circuit and driver logic circuit, which affects signal quality and increases EMI noise.

Innovation Solution

The integration of a high-speed interface circuit block with a serial/parallel conversion circuit is positioned between the physical layer circuit and the driver logic circuit, increasing the distance between them and reducing noise interference, while also optimizing the layout to minimize impedance mismatch and signal line length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the physical layer circuit and driver logic circuit are disposed adjacently to reduce layout area, then layout efficiency is improved, but noise interference increases and signal quality deteriorates

Engineering Contradiction:
Improvelayout areaVSAvoidnoise interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a high-speed interface logic circuit as an intermediary component between the physical layer circuit and the driver logic circuit. This intermediate circuit block acts as a buffer zone that spatially separates the noise-sensitive physical layer circuit from the noise-generating driver logic circuit, thereby reducing mutual noise interference while maintaining compact layout

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If the distance between physical layer circuit and driver logic circuit is increased to reduce noise, then signal quality is improved, but layout area increases

Engineering Contradiction:
Improvenoise interferenceVSAvoidlayout area
Core Design Contradiction:
Object-affected harmful factorsVSArea of stationary object

Solution Approach 1:

The patent arranges the physical layer circuit, high-speed interface logic circuit, and driver logic circuit in a linear sequence along a signal transmission path, utilizing the third dimension (depth/length of signal flow) rather than simply increasing lateral separation. This dimensional approach to spacing allows effective noise isolation without excessive area consumption

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Object-generated harmful factors

If high-speed serial transfer is implemented to reduce EMI noise, then EMI noise is reduced, but susceptibility to internal noise increases

Engineering Contradiction:
ImproveEMI noiseVSAvoidnoise susceptibility
Core Design Contradiction:
Object-generated harmful factorsVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the high-speed interface logic circuit as a separate functional block from both the physical layer circuit and the driver logic circuit. This extraction creates physical and functional isolation, allowing the high-speed serial transfer to operate with reduced EMI noise while the separated logic circuit handles signal conversion without being susceptible to internal noise from other circuits

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS7450037B2Integrated circuit device and electronic instrument that transfers data through a serial bus
Publication Date: 2008.11.11 138 EAST LCD ADVANCEMENTS LTD
  • US7450037B2 patent drawing
  • US7450037B2 patent drawing
  • US7450037B2 patent drawing

AI summary

An integrated circuit device includes a high-speed I/F circuit block which transfers data through a serial bus, and a driver logic circuit block which generates a display control signal. The high-speed I/F circuit block includes a physical layer circuit including a receiver circuit, and a high-speed I/F logic circuit including a serial/parallel conversion circuit. The high-speed I/F circuit block is disposed so that the high-speed I/F logic circuit is disposed between the physical layer circuit and the driver logic circuit block and the physical layer circuit and the driver logic circuit block are not adjacently disposed.