Serial Bus Read Addressing Without a Header Read Bit

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing serial data communication systems face limitations in address space for read operations due to the fixed frame length, which cannot be easily extended without increasing latency and buffer handling complexity.

Innovation Solution

A method and bus nodes that utilize a predetermined address in the header field to differentiate read and write operations, allowing the payload data to represent the actual read address, thereby expanding the address space without increasing frame length.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the frame length is extended to increase address space, then the address space for read operations is improved, but the transmission latency and buffer handling complexity increase

Engineering Contradiction:

Improveaddress spaceVSAvoidtransmission latency

Core Design Contradiction:

Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent embeds the read address information within the payload field of the frame, nesting the address data inside the existing frame structure. This allows the address space to be expanded without extending the overall frame length, as the read address is hidden within the payload portion rather than requiring additional header bits.

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

Instead of using the conventional approach where the address is placed in the header field with a read/write indicator bit, the patent inverts the structure by using a predetermined header address combined with payload data to convey the actual read address. This inversion allows the payload field to serve dual purposes: carrying data and encoding the read address.

Inventive Principle:

Principle #13The other way round (Inversion)

2Adaptability or versatility

If the frame length is extended to increase address space, then the address space for read operations is improved, but the buffer handling complexity increases

Engineering Contradiction:

Improveaddress spaceVSAvoidbuffer handling complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The read address is nested within the payload field, allowing the buffer structure to remain unchanged. The responder unit can process frames using the same buffer width (e.g., 16 or 32 bits) while extracting the read address from the payload portion, avoiding the need for wider buffers or more complex buffer management logic.

Inventive Principle:

Principle #7Nested doll (Nesting)

Solution Approach 2:

The payload field is given multi-functionality: it serves both as the data payload and as the carrier for the read address information. This universal usage eliminates the need for separate address fields or extended buffer structures, keeping the buffer handling logic simple while expanding the address space.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Ease of operation

If a read indicator bit is used in the header, then the read operation identification is simplified, but the address space is limited

Engineering Contradiction:

Improveread operation identificationVSAvoidaddress space

Core Design Contradiction:

Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent inverts the conventional approach by not using a read indicator bit in the header. Instead, it uses a predetermined header address combined with the payload data to indicate read operations. This inversion trades the simplicity of header-based identification for a more compact structure that expands address space.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The read address information is extracted from the header field and placed within the payload field. This extraction allows the header to maintain its original size and structure, preserving simple operation identification, while the payload field carries the expanded address information.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS12468642B2Serial bus communication without read indication

Publication Date: 2025.11.11 INFINEON TECHNOLOGIES AG

AI summary

A method for a responder bus node is described herein. In accordance with one embodiment, the method includes receiving a first frame over a first data channel of a serial bus, wherein the first frame comprises at least a first header field with first header data and a first payload field with first payload data. The method further includes checking whether a first address, which is based on the first header data, is equal to a predetermined address. When the first address is equal to the predetermined address, a read operation is performed using a second address, which is based on the first payload data, and, when the first address is not equal to the predetermined address, a write operation is performed using the first address and the payload data. Furthermore, a corresponding method for a commander bus node, as well as a respective responder and commander bus node are described.