Serial Data Transmission Chip for Multi-Channel CPLD Links
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Solution Overview
Problem
The complexity of electronic device structures is exacerbated by the large number of signal lines required for communication between chips, particularly complex programmable logic devices (CPLDs), leading to a cumbersome and inefficient setup.
Innovation Solution
Implementing a data transmission chip with a high-speed serial interface that serially transmits multiple channels of signals in data frames, reducing the need for physical signal lines and enhancing transmission efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If CPLDs communicate with each other through multiple interfaces with corresponding signal lines, then communication functionality is achieved, but the quantity of signal lines increases and device structure becomes complex
Solution Approach 1:
The patent merges multiple parallel signal transmission channels into a single high-speed serial interface. Instead of using multiple separate interfaces with corresponding signal lines between CPLDs, the invention consolidates these communications into one interface that transmits data in serial form, thereby reducing the quantity of signal lines while maintaining communication functionality.
Solution Approach 2:
The patent introduces an intermediary data frame structure that encapsulates multiple channels of data. This data frame acts as a mediator that allows multiple logical communication channels to be transmitted through a single physical interface, reducing the need for multiple physical signal lines while preserving the ability to communicate across multiple channels.
2Productivity
If multiple signal lines are used for communication between chips, then communication capacity is increased, but pin resources are consumed and structure is simplified less
Solution Approach 1:
The patent combines multiple communication channels into a single high-speed serial interface, allowing multiple channels of data to be transmitted through one physical connection instead of requiring separate pins for each channel. This merging approach maintains high communication capacity while significantly reducing pin resource consumption.
Solution Approach 2:
The patent transitions from parallel signal transmission (multiple signal lines simultaneously) to serial signal transmission (multiple channels sequentially over one line). This dimensional change in data transmission approach allows high communication capacity to be achieved through time-division multiplexing on a single interface, reducing the number of pins required.
3Productivity
If high-speed serial interface is used to transmit multiple channels of data, then transmission efficiency is improved, but data frame generation complexity increases
Solution Approach 1:
The patent implements a universal data frame structure that can accommodate multiple channels of data with different types and formats. This standardized frame structure serves multiple functions: it encapsulates various data channels, provides synchronization information, and enables efficient serial transmission. The multi-functionality of the data frame reduces the need for separate handling mechanisms for different data types.
Solution Approach 2:
The patent changes the parameters of data transmission by organizing multiple channels into a structured data frame format with specific timing and synchronization parameters. This parameterization allows the system to manage complexity through standardized rules for data encapsulation and transmission, making the data frame generation process more systematic and manageable despite the increased functionality.
Data Source
AI summary
A data transmission chip and an electronic device are provided, and belong to the field of electronic technologies. A low-speed interface of the data transmission chip is configured to receive a plurality of channels of first signals, and a high-speed serial interface of the data transmission chip is configured to serially transmit the plurality of channels of first signals to another data transmission chip in a form of a data frame.


