Serial Data Clock Recovery Using Rising and Falling Edge Signals
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Solution Overview
Problem
Current data transmission and reception devices face challenges in improving communication quality, particularly in high-speed serial data communication, due to limitations in operating speed and power consumption, and are restricted by the need for precise clock synchronization and phase detection, which affects jitter tolerance and bandwidth utilization.
Innovation Solution
The proposed solution involves a data reception device with a signal generation unit that inverts serial data signals at rising and falling edges and a clock recovery unit using these signals, along with a data transmission/reception system that allows for dual-direction digital signal transmission over a single path, utilizing filters to separate frequency bands and enable communication over various cable types, including coaxial cables.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If serial data communication is performed at high speed, then communication quality improves, but operating speed limitations and power consumption increase
Solution Approach 1:
The patent segments the clock recovery function into two independent phase detection paths: one detecting phase at rising edges and another detecting phase at falling edges. This segmentation allows the system to process data at higher speeds by distributing the clock recovery workload across parallel paths, thereby improving communication quality while managing power consumption through selective operation of detection paths.
2Measurement precision
If clock synchronization precision is increased, then data reception accuracy improves, but device complexity increases
Solution Approach 1:
The patent merges the functionality of separate rising-edge and falling-edge detection circuits into a unified clock recovery apparatus. Both phase detection paths feed into a common charge pump and loop filter, allowing high-precision clock synchronization to be achieved through coordinated operation of integrated components rather than entirely separate systems, thus reducing overall device complexity.
3Reliability
If jitter tolerance is improved, then communication reliability increases, but bandwidth utilization decreases
Solution Approach 1:
The patent implements dynamic phase detection that adapts to incoming data characteristics. The system can dynamically switch between rising-edge detection, falling-edge detection, or both simultaneously based on the data pattern and jitter conditions. This dynamic operation allows the system to maintain high jitter tolerance while optimizing bandwidth utilization by activating only the necessary detection paths for current operating conditions.
Data Source
AI summary
A data reception device that can improve communication quality when transmitting/receiving serial data is to be provided. There is provided the data reception device including a signal generation unit that generates, from serial data received, a first signal whose value is inverted at a rising timing of the serial data and a second signal whose value is inverted at a falling timing of the serial data, and a clock recovery unit that performs clock recovery using the first signal and the second signal generated by the signal generation unit.