Automatic Data Aligner for Multi-Port Serial Receiver Skew
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Solution Overview
Problem
In serial link technologies, particularly in Serial Port Memory Technology (SPMT), multiple serial links are required to meet high memory bandwidth demands, leading to data skew issues due to varying flight times across channels, which conventional techniques like FIFO-based methods cannot effectively compensate, especially in short interconnection scenarios like host-memory connections.
Innovation Solution
An automatic data aligner mechanism is employed to convert single-bit transmission into parallel bits across multiple ports, binding channels to reduce latency by inserting delays and synchronizing data without relying on special characters, thereby aligning data across channels with reduced latency and without the need for bulky FIFO structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple serial links are used to support high memory bandwidth, then bandwidth requirement is met, but data skew issues occur due to varying flight times across channels
Solution Approach 1:
The patent applies preliminary action by inserting delay elements into data paths during the setup phase before normal data transmission begins. The aligner measures flight time differences between channels using training patterns and pre-compensates by adding appropriate delays to each channel, so that when actual data transmission starts, all channels are already synchronized. This prevents data skew issues rather than correcting them during operation.
Solution Approach 2:
The patent changes the latency parameter of each channel individually by inserting different numbers of delay elements based on measured flight time differences. The system measures the actual flight time for each channel during setup and adjusts the delay parameter for that specific channel to equalize arrival times across all channels, transforming the system from having unequal latencies to having equalized latencies.
2Manufacturing precision
If conventional FIFO-based methods are used to compensate for path differences, then data alignment is achieved, but device complexity and power consumption increase
Solution Approach 1:
The patent extracts and removes the bulky FIFO (First-In-First-Out) buffer structures from the data alignment system. Instead of using large storage buffers to compensate for timing differences, the invention replaces them with minimal delay elements that provide the same synchronization function with much lower complexity and power consumption. The essential alignment function is preserved while eliminating the excessive resource usage of FIFO-based approaches.
Solution Approach 2:
The patent uses inexpensive, minimal delay elements instead of expensive, complex FIFO buffers. The delay elements are simple circuit components that provide timing compensation without requiring large storage capacity or complex control logic. This substitution dramatically reduces both device complexity and power consumption while maintaining the necessary data alignment functionality.
3Manufacturing precision
If frame aligning with SYNC characters is used to identify starting position, then data alignment is achieved, but latency increases due to sequential processing
Solution Approach 1:
The patent performs alignment measurements and delay configurations during a setup phase before normal data transmission begins. Training patterns are sent and flight time differences are measured in advance, allowing the system to pre-configuring the appropriate delays for each channel. When actual data transmission starts, the alignment is already established, eliminating the need for sequential SYNC character detection and reducing latency to minimal values.
Solution Approach 2:
The patent uses periodic training patterns during the setup phase to measure flight time differences between channels. These periodic test signals allow the system to characterize the timing behavior of each channel and establish the appropriate delay compensation. Once this periodic calibration is complete, normal data transmission proceeds without requiring continuous SYNC character insertion and detection, reducing overall latency.
4Manufacturing precision
If distinguishable predefined patterns are inserted to measure path differences, then channel alignment is achieved, but protocol complexity increases
Solution Approach 1:
The patent makes the alignment measurement process universal by using the same basic training pattern mechanism that is already part of the serial link initialization protocol. Rather than introducing special dedicated measurement patterns, the system uses standard SYNC characters and existing frame structures for flight time measurement. This multi-functional approach allows the same protocol elements to serve both data transmission and alignment measurement purposes, minimizing protocol complexity overhead.
Data Source
AI summary
A method, apparatus and system for employing an automatic data aligner for multiple serial receivers in serial link technologies is provided. In one embodiment, converting a transmission data path of a single bit into a parallel bit via a data aligner, wherein the data is being transmitted via one or more ports. Further, binding data transmission channels to reduce latency in transmission of the data, wherein the binding of the data transmission channels further includes inserting delay to match latency via the one or more ports.