Serial Data Transmission with Automatic Baud Rate Synchronization
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Solution Overview
Problem
Existing serial data transmission methods between microcontrollers or computers and peripheral units require multiple lines and are sensitive to manufacturing tolerances and long-term drifts in baud rates, making them unreliable over long distances and prone to electromagnetic interference.
Innovation Solution
A method using a single or two differential lines for bidirectional data transmission, where the baud rate is automatically detected and synchronized, and data is secured with cyclic redundancy checks, allowing operation at various speeds and accommodating different internal clock frequencies, with a flexible addressing scheme to support multiple peripheral units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional serial interfaces are used with multiple lines for control signals and data transmission, then the transmission reliability is improved, but the device complexity and number of lines increase
Solution Approach 1:
The patent combines multiple control signals and data transmission functions into a single wire interface. The microcontroller integrates the functions of data transmission, addressing, and control signal generation on one wire, eliminating the need for separate control lines while maintaining reliable communication with peripheral units.
Solution Approach 2:
The single wire interface is designed to perform multiple functions simultaneously: data transmission in both directions, addressing of peripheral units, and control signal generation. This universal interface replaces conventional multi-line interfaces that required separate dedicated lines for each function.
2Productivity
If fixed baud rate is used in serial transmission, then the transmission speed is standardized, but the adaptability to different clock frequencies and long-term drifts is reduced
Solution Approach 1:
The patent implements dynamic baud rate adjustment where the microcontroller automatically detects and adapts to the actual baud rate of peripheral units. The system can switch between different baud rates (e.g., 9600, 19200, 38400) depending on the peripheral unit's capabilities, allowing flexible operation across varying clock frequencies and drift conditions.
Solution Approach 2:
The microcontroller receives feedback signals from peripheral units that indicate their operational status and baud rate. Based on this feedback, the microcontroller adjusts its own baud rate settings to match, ensuring synchronized communication despite variations in internal clock frequencies or long-term drifts.
3Length of stationary object
If data transmission occurs over long distances via cables, then the coverage range is extended, but the susceptibility to electromagnetic interference and data corruption increases
Solution Approach 1:
The patent introduces cyclic redundancy check (CRC) as an intermediary error detection mechanism between the transmitter and receiver. The CRC calculates a check value based on the transmitted data and compares it with the received data, detecting any corruption caused by electromagnetic interference and enabling the system to request retransmission or discard corrupted data.
4Adaptability or versatility
If multiple peripheral units are connected to the same bus, then the system flexibility is improved, but the addressing complexity and potential conflicts increase
Solution Approach 1:
The patent segments the addressing space into distinct ranges for different peripheral unit types. Each peripheral unit is assigned a unique address within its designated range, and the microcontroller uses these segmented addresses to selectively communicate with specific units. This segmentation prevents address conflicts while maintaining flexible multi-unit connectivity.
Data Source
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AI summary
The invention relates to a method for serial, in particular bidirectional, data transmission between a microcontroller or computer (M) and one or more peripheral units (IC1, IC2,?), and to a peripheral unit suitable for use in such a method and having an appropriate circuit arrangement. As a result of the datagram structure according to the invention, by means of which commands for read and write accesses and responses to read accesses are transmitted, as well as an optional allocation of unique addresses to the peripheral units, at least largely interference-free and reliable serial transmission of data over a single (i.e. single-wire) line or over two differential lines is created.