Serial Data Clock Signal Duty Cycle Control
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Solution Overview
Problem
Serial data communication systems face high power consumption and complex wiring due to the need for high frequency clock signals and multiple connection lines for transmitting and receiving clock signals, which is costly and inefficient.
Innovation Solution
A serial data communication system that uses a local clock generation device to produce a clock signal with a duty cycle based on a control signal, allowing the serial data communication control device to derive transmit and receive clock signals, thus reducing the complexity of wiring and power consumption by requiring only a single clock line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a high frequency clock signal is used to derive multiple communication clocks, then the required communication clocks can be generated, but the power consumption increases significantly due to guiding high frequency signals over pins
Solution Approach 1:
The patent extracts the clock generation function from the main communication device and places it in a separate local clock generation device. This allows the main device to receive only a single low-frequency clock signal while the local device generates the required multiple communication clocks locally, eliminating the need to guide high frequency clock signals over pins and significantly reducing power consumption.
Solution Approach 2:
The local clock generation device acts as an intermediary between the single clock source and multiple communication devices. It receives a single clock signal and generates the required multiple communication clocks, serving as a mediator that eliminates the need for high frequency signal transmission over pins while maintaining the ability to support multiple communication clocks.
2Reliability
If a local clock generator provides separate transmit and receive clock signals, then accurate clocking is achieved, but the wiring complexity increases requiring at least three connection lines
Solution Approach 1:
The patent merges the transmit and receive clock signals into a single clock line by using a single clock signal with variable duty cycle. The local clock generation device modulates the duty cycle of the clock signal to encode both transmit and receive clock information, eliminating the need for separate clock lines and reducing wiring complexity while maintaining clock signal accuracy.
Solution Approach 2:
The patent changes the duty cycle parameter of the clock signal to convey different clocking information. By varying the duty cycle, the system can differentiate between transmit and receive operations using a single clock line, thereby reducing wiring complexity while maintaining reliable clock synchronization.
3Reliability
If multiple connection lines are used for clock signals, then precise clock control is achieved, but the cost and complexity of the system increases
Solution Approach 1:
The single clock line serves multiple functions by carrying both transmit and receive clock information through duty cycle modulation. This universal approach allows one connection line to perform the work of multiple lines, reducing system complexity and cost while maintaining precise clock control through the duty cycle variations.
Data Source
AI summary
A serial data communication system (10) comprises—a local clock generation device (12) adapted for generating a clock signal (16) with a duty cycle depending on a control signal (18), and—a serial data communication control device (14) adapted for generating the control signal (18) depending on the receipt of a serial data signal and for deriving a transmit and receive clock signal (20, 21) from the clock signal (16) received from the local clock generation device (12).