Serial Data Eye Width Estimator On-Chip Monitoring
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Solution Overview
Problem
High-speed serial data signals experience attenuation and distortion due to frequency-dependent signal loss across interconnects, causing inter-symbol interference that affects clock and data recovery circuitry, and existing methods lack the ability to effectively monitor the 'eye' of the signal within the receiver chip for diagnostic and adjustment purposes.
Innovation Solution
The apparatus and method involve clock and data recovery circuitry to produce phase-shifted clock signals for sampling the serial data signal, allowing for the determination of the eye width and error checking, enabling on-chip monitoring and adjustment of equalization techniques without external probes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external oscilloscope probing is used to monitor the eye of high-speed serial data signals, then signal eye width can be measured, but the method cannot probe internal high-speed nodes of the chip and requires external equipment
Solution Approach 1:
The patent embeds eye monitoring circuitry (sampling circuit, phase detector, eye width calculator) directly within the receiver chip, nesting the measurement functionality inside the device being measured. This allows internal high-speed nodes to be probed without external equipment, resolving the contradiction between measurement capability and ease of operation.
Solution Approach 2:
The patent introduces an intermediary sampling circuit that captures eye information internally before data is lost. The sampling circuit uses a phase detector to sample the incoming serial data at multiple phases and reconstructs eye width information, serving as an intermediary between the high-speed signal and the processing logic.
2Measurement precision
If phase-shifted clock signals are used to sample the serial data signal, then eye width determination is enabled, but additional circuitry complexity is introduced
Solution Approach 1:
The phase detector circuit serves multiple functions: it generates phase-shifted clock signals for sampling, detects phase differences between the incoming data and reference clock, and provides timing information for eye width calculation. This multi-functionality reduces overall device complexity while enabling precise eye width determination.
Solution Approach 2:
The patent combines the phase detector, sampling circuit, and eye width calculator into an integrated eye monitoring module within the receiver. By merging these functions into a single cohesive unit, the patent reduces the complexity that would arise from separate independent circuits while maintaining measurement precision.
3Adaptability or versatility
If on-chip eye monitoring capability is implemented, then internal high-speed nodes can be observed and equalization results can be analyzed, but device complexity increases
Solution Approach 1:
The receiver chip performs self-diagnosis by incorporating eye monitoring capability directly into its structure. The monitoring circuit allows the device to automatically assess its own performance, analyze equalization results, and identify issues without requiring external test equipment, thereby improving adaptability while managing complexity through self-sufficiency.
Solution Approach 2:
The eye monitoring circuit provides feedback about the quality of the received signal and the effectiveness of equalization processing. This feedback mechanism enables automatic adjustment and optimization of receiver parameters, enhancing diagnostic capability while using the feedback loop to manage system complexity efficiently.
Data Source
AI summary
Methods and apparatus for determining at least part of the width of the eye of a high-speed serial data signal use clock and data recovery circuitry operating on that signal to produce a first clock signal having a first phase relationship to the data signal. The first clock signal is used to produce a second clock signal whose phase can be controllably shifted relative to the first phase. The second clock signal is used to sample the data signal with different amounts of phase shift, e.g., until error checking circuitry detects that data errors in the resulting sample exceed an acceptable threshold for such errors. The amount(s) of phase shift that caused exceeding the threshold can be used as a basis for a measurement of eye width.