Serial Data Conversion with Error-Reflecting Parity Handling

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Solution Overview

Problem

In serial communication systems, existing data conversion apparatuses fail to accurately reflect erroneous bit values in the parity bit of converted serial binary data, leading to incorrect parity calculations.

Innovation Solution

A data conversion apparatus that includes a converter for processing bit values based on a predetermined rule, with parity calculators for calculating initial and resulting parity bits, and a comparator to adjust the parity bit accordingly, ensuring that the parity bit of the converted data reflects any erroneous bit values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the converter re-calculates the parity bit from the converted serial binary data SDATA2, then the parity bit does not reflect erroneous bit values in the input data, but this causes loss of error information and reduces reliability

Engineering Contradiction:
Improveparity bit accuracyVSAvoiderror information
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The patent applies preliminary action by calculating the first parity bit from the input serial binary data SDATA1 before the conversion process occurs. This preserved parity bit is then compared with the second parity bit calculated after conversion, allowing the system to detect whether errors occurred during conversion while maintaining the original error information.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by comparing the first parity bit (calculated before conversion) with the second parity bit (calculated after conversion). This feedback mechanism allows the system to detect discrepancies caused by conversion errors and take appropriate corrective actions, such as requesting retransmission or flagging the converted data as unreliable.

Inventive Principle:
Principle #23Feedback

2Loss of information

If the converter preserves the original parity bit through conversion, then error information is maintained, but the parity calculation becomes complex requiring multiple parity calculators and comparators

Engineering Contradiction:
Improveerror informationVSAvoidparity calculation structure
Core Design Contradiction:
Loss of informationVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the parity bit handling into distinct functional segments: a first parity calculator that processes input data SDATA1, a converter that transforms the data, a second parity calculator that processes converted data SDATA2, and a comparator that compares the two parity bits. This segmentation allows each component to perform its specific function independently, making the overall system more manageable and reliable despite the increased complexity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10566998B2Data conversion apparatus
Publication Date: 2020.02.18 MURATA MFG CO LTD
  • US10566998B2 patent drawing
  • US10566998B2 patent drawing

AI summary

A first parity calculator calculates one parity bit for serial binary data to be subjected to a conversion process. A second parity calculator calculates one parity bit for serial binary data obtained as a result of the conversion process. When both parity bits do not match, a multiplexer outputs, as a parity bit of the serial binary data obtained as a result of the conversion process, a parity bit obtained by inverting one parity bit included in the serial binary data to be subjected to the conversion process.