Asynchronous Serial Data Transmission Synchronization Bit

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Solution Overview

Problem

Existing methods for transmitting binary-encoded data require multiple synchronization mechanisms, leading to increased overhead and reduced data throughput due to stringent timing accuracy requirements for both transmitter and receiver.

Innovation Solution

A method for asynchronous, unidirectional serial data transmission using a single synchronization bit, where the position of the synchronization bit is determined statistically, allowing the receiver to synchronize with the transmitter and enabling continuous data transmission with minimal overhead and maximum throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple synchronization mechanisms are used for data transmission, then synchronization reliability is improved, but overhead increases and data throughput decreases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoiddata throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts and eliminates redundant synchronization mechanisms, retaining only a single synchronization bit per frame. This reduces the overhead from multiple synchronization bits to just one, thereby increasing the proportion of data bits in each frame and improving overall data throughput while maintaining sufficient synchronization reliability through statistical timing analysis.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the synchronization approach from requiring precise timing parameters and multiple synchronization bits to using a single synchronization bit combined with statistical timing analysis. The receiver uses measured bit durations from received frames to dynamically adjust its timing, eliminating the need for stringent predefined timing accuracy requirements.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If multiple synchronization mechanisms are used for data transmission, then synchronization reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidsynchronization mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes complex multiple synchronization mechanisms and replaces them with a simple single synchronization bit approach. The receiver implementation is simplified to use basic timing measurements and statistical analysis rather than complex synchronization protocols, reducing device complexity while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Measurement precision

If stringent timing accuracy requirements are imposed on transmitter and receiver, then synchronization precision is improved, but device complexity and implementation difficulty increase

Engineering Contradiction:
Improvesynchronization precisionVSAvoidtiming control complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The receiver performs self-synchronization by measuring the actual bit durations from received frames and using these measurements to adjust its own timing. Instead of requiring precise external timing control, the system uses the incoming data stream itself to calibrate the receiver's timing, eliminating the need for stringent external timing accuracy requirements and simplifying implementation.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20240430072A1Computer-implemented methods for transmitting or receiving data, devices for transmitting or receiving data
Publication Date: 2024.12.26 ROBERT BOSCH GMBH
  • US20240430072A1 patent drawing
  • US20240430072A1 patent drawing
  • US20240430072A1 patent drawing

AI summary

A computer-implemented method for receiving data. Data are received in a bit stream asynchronously and serially via a transmission medium, wherein the data are received in frames that include a respective portion of the data, wherein the frames include a respective synchronization bit, wherein consecutively received frames have alternating values of the synchronization bits. A start of the consecutive frames is determined depending on the values of the bits of the frames. The portions of the data from consecutive frames are compiled without the synchronization bit to form the data. A computer-implemented method for transmitting data, a device, and a computer-implemented method for transmitting the data, are also described.