Serial Data Transfer Idle Power Reduction via Link Controller

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Solution Overview

Problem

High-speed serial transfer interfaces consume power during idle periods due to the continuous operation of functional blocks like scramblers and encoders, which can lead to increased power consumption in mobile devices, and existing solutions may cause errors if the destination apparatus does not conform to specific signal outputs.

Innovation Solution

A serial data transfer apparatus that stops the operation of the Tx block responsible for generating idle data and stores idle data received from the destination apparatus, allowing it to output conforming idle data during idle periods while reducing power consumption by halting non-essential operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the Tx block continues to operate during idle periods to generate idle data, then the output signal conforms to the serial bus standard, but power consumption increases

Engineering Contradiction:
Improvestandard complianceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the idle data generation function from the main data transmission path by using a separate idle data buffer. This allows the Tx block to be stopped during idle periods while pre-generated idle data is output from the buffer, thereby reducing power consumption while maintaining standard compliance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements preliminary action by pre-generating and storing idle data in the idle data buffer before idle periods occur. This pre-prepared idle data can be output during idle periods without requiring the Tx block to operate, thus reducing power consumption while ensuring standard-compliant signal output.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If the Tx block stops operation during idle periods to reduce power consumption, then power consumption decreases, but the output signal may not conform to the serial bus standard

Engineering Contradiction:
Improvepower consumptionVSAvoidstandard compliance
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent introduces an intermediary component - the idle data buffer - that mediates between the stopped Tx block and the serial bus output. This buffer holds pre-generated idle data and supplies it during idle periods, ensuring that the output signal conforms to the serial bus standard even when the main transmission block is inactive.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a copy of the idle data transmission function by storing pre-generated idle data in a buffer. This copy can be output during idle periods without requiring the original Tx block to operate, thus maintaining standard compliance while reducing power consumption.

Inventive Principle:
Principle #26Copying

3Reliability

If functional blocks operate continuously to maintain signal integrity, then communication reliability is improved, but power consumption increases

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent segments the data transmission function into two separate paths: one for active data transmission and another for idle data output. The idle data buffer handles the idle period transmissions independently, allowing the main functional blocks to be stopped during idle periods while maintaining communication reliability through the segmented idle data path.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8214678B2Serial data transfer apparatus
Publication Date: 2012.07.03 RENESAS ELECTRONICS CORP
  • US8214678B2 patent drawing
  • US8214678B2 patent drawing
  • US8214678B2 patent drawing

AI summary

A serial data transfer apparatus includes a transport controller that performs a process of a transport layer, a link controller that performs a process of a link layer, and a physical layer circuit that performs a process of a physical layer. The serial data transfer apparatus transmits and receives data with a destination apparatus via a serial bus. The link controller outputs idle data, which is received from the destination apparatus, to the physical layer circuit, and stops to operate of a unit responsible for generating data to transmit to the destination apparatus while outputting the idle data to the physical layer circuit. This enables to output idle data defined in the standard in an idle period of the serial data transfer apparatus and also reduce the power consumption.