Bidirectional Serial Data Transmission via Single Line Clock Synchronization

The patent combines clock signal and data signal transmission onto a single electric line, eliminating the need for separate clock and data lines. The master device generates clock pulses that are transmitted along with data signals on the same line, reducing the number of physical connections and hardware components required while maintaining reliable bidirectional communication.

The single electric transmission line serves multiple functions: it carries both clock synchronization signals and data signals in both directions. The line is used for initiating read/write cycles, transmitting data bits, and maintaining synchronization between master and slave devices, thereby eliminating the need for dedicated separate lines for each function.

The patent enables a single controller pin to serve multiple functions including data transmission, clock signal generation, and bidirectional communication. This multi-functional approach eliminates the need for dedicated interface hardware such as separate UART receivers, timers, or specialized communication controllers, thereby reducing component count and manufacturing cost while maintaining reliable communication.

The master device generates its own clock pulses internally and transmits them along with data signals on the same electric line. The slave device synchronizes its operations based on these transmitted clock pulses without requiring external clock signals or dedicated synchronization hardware, allowing the system to self-synchronize using the existing single wire infrastructure.

The slave device monitors the clock pulses transmitted on the electric line and uses them to synchronize its internal operations. The slave device waits for specific clock edges (rising or falling) to sample data signals, ensuring precise timing without requiring complex synchronization hardware. The feedback mechanism of continuously monitoring the clock signal enables accurate synchronization using minimal resources.

The patent replaces complex mechanical/electronic synchronization hardware with a software-based timing approach. Instead of using dedicated synchronization circuits, counters, or phase-locked loops in each slave device, the system uses the transmitted clock pulses to control software-based data sampling and processing, thereby achieving precise synchronization with minimal hardware overhead.