Serial Flash Memory Interleaved Programming Wear Leveling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing Flash memory systems face performance limitations due to signal integrity issues, high power consumption, slow programming times, and unequal program/erase wearing across devices, leading to limited lifespan and inefficient data storage.
Innovation Solution
The implementation of a high-speed Flash memory system architecture that serially connects Flash memory devices, allowing for interleaved programming operations and wear leveling by distributing data pages across multiple devices, optimizing programming throughput and extending device lifespan.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple Flash memory devices are connected in parallel to a single channel, then storage capacity is increased, but signal integrity deteriorates and power consumption increases
Solution Approach 1:
The patent divides the parallel connection architecture into serial connections, where multiple Flash memory devices are connected in a daisy-chain manner through I/O pins. This segmentation eliminates the signal integrity issues associated with parallel multi-drop configurations while maintaining the ability to access multiple devices.
Solution Approach 2:
The patent introduces a serial communication protocol as an intermediary mechanism between the host and multiple Flash devices. Commands and data are transmitted sequentially through the serial interface, allowing the system to manage multiple devices without the signal degradation problems of parallel connections.
2Quantity of substance
If multiple Flash memory devices are connected in parallel, then storage capacity is increased, but power consumption increases
Solution Approach 1:
The patent segments the power management across multiple devices connected in series. Only the actively selected device needs to be fully powered, while other devices in the serial chain can remain in lower power states, reducing overall system power consumption compared to parallel connections where all devices share common power lines.
3Reliability
If programming operations are performed sequentially in Flash memory devices, then device lifespan is extended through wear leveling, but programming speed decreases
Solution Approach 1:
The patent implements wear leveling algorithms that continuously monitor and distribute program/erase cycles across all Flash devices in the serial chain. This continuous redistribution ensures uniform wear patterns and extends system lifespan without requiring pauses in programming operations, maintaining continuous useful action.
Solution Approach 2:
The patent employs dynamic wear leveling strategies that adaptively adjust the programming distribution across devices based on real-time wear status. The system can dynamically switch between different programming patterns to optimize both lifespan extension and programming throughput.
4Ease of manufacture
If data is stored linearly in Flash memory devices, then storage simplicity is maintained, but programming time increases and wear is unevenly distributed
Solution Approach 1:
The patent segments the data storage across multiple Flash devices in the serial chain, distributing data pages across different devices rather than filling one device linearly. This segmentation enables parallel programming operations to proceed more efficiently and distributes wear more evenly across the storage system.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A Flash memory system architecture having serially connected Flash memory devices to achieve high speed programming of data. High speed programming of data is achieved by interleaving pages of the data to be programmed amongst the memory devices in the system, such that different pages of data are stored in different memory devices. A memory controller issues program commands for each memory device. As each memory device receives a program command, it either begins a programming operation or passes the command to the next memory device. Therefore, the memory devices in the Flash system sequentially program pages of data one after the other, thereby minimizing delay in programming each page of data into the Flash memory system. The memory controller can execute a wear leveling algorithm to maximize the endurance of each memory device, or to optimize programming performance and endurance for data of any size.