Serial Flash Memory Extended Addressing Mode
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Solution Overview
Problem
The limited addressability and storage capacity of typical serial flash memory devices restrict their application in execute-in-place (XiP) implementations and other applications, where increased memory access is needed, while maintaining compatibility with devices that do not support extended addresses is a challenge.
Innovation Solution
Enhancing the addressability of serial flash memory devices by introducing an extended addressing mode using an additional 8-bit address, allowing up to 32-bit addressing, while maintaining compatibility with 24-bit address mode devices through a serial peripheral interface (SPI) protocol, enabling access to a larger memory space without disrupting existing systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If an extended addressing mode with additional 8-bit address is introduced, then the maximum addressable memory space increases from 16M to 32G, but the device complexity and protocol compatibility requirements increase
Solution Approach 1:
The patent implements a dynamic addressing mode that can switch between 24-bit and 32-bit address modes based on command detection. The memory device dynamically adjusts its address bus width by detecting specific command codes in the SPI protocol, allowing it to adapt between standard and extended addressing without physical hardware changes. This resolves the contradiction by making the addressing capability flexible rather than fixed.
Solution Approach 2:
The patent changes the addressing parameter from a fixed 24-bit mode to a variable mode that can be 24-bit or 32-bit based on command detection. By modifying the address bus width parameter dynamically through protocol-based command recognition, the system achieves larger addressable memory space while maintaining compatibility with existing 24-bit systems through parameter variability.
2Quantity of substance
If an extended addressing mode is implemented, then access to larger memory space is enabled, but compatibility with devices that only support 24-bit addresses may be compromised
Solution Approach 1:
The patent makes the SPI protocol universal by incorporating multiple addressing modes within a single protocol framework. The memory device can function in both 24-bit address mode (compatible with standard devices) and 32-bit address mode (enabling extended memory access) by detecting specific command codes. This multi-functionality allows the same hardware interface to serve both legacy and advanced applications without requiring separate protocols or hardware versions.
Solution Approach 2:
The patent introduces a command code intermediary that mediates between the controller and the memory device to select the appropriate addressing mode. Specific command codes act as intermediaries to trigger extended addressing mode, while standard commands maintain 24-bit mode operation. This intermediary mechanism allows seamless transition between modes and maintains backward compatibility while enabling extended functionality.
3Quantity of substance
If the address bus width is increased to support 32-bit addressing, then the storage capacity becomes accessible, but the interface complexity and signal requirements increase
Solution Approach 1:
The patent implements a dynamic address bus that can change its effective width between 24 bits and 32 bits based on the detected command mode. Rather than permanently increasing the physical interface complexity, the system dynamically activates additional address bits only when extended addressing commands are detected, keeping the interface simple for standard operations while enabling expanded capability when needed.
Solution Approach 2:
The patent segments the addressing functionality into two distinct operational modes: standard 24-bit addressing for common applications and extended 32-bit addressing for large capacity needs. By segmenting the address space and activating only the necessary portion based on command detection, the system avoids the permanent complexity overhead of a full 32-bit interface while still providing access to extended storage capacity when required.
Data Source
AI summary
Example embodiments for providing enhanced addressability for a serial flash memory device may comprise providing an extended addressing mode to enable access to a larger range of memory locations.