Serial Interface Latency Reduction via Run-Length Limited Encoding

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Solution Overview

Problem

Conventional serial interfaces experience increased latency at higher frequencies, which is undesirable as semiconductor device speeds increase, and there is a need for a serial interface that offers higher bandwidth with minimal latency comparable to parallel interfaces.

Innovation Solution

A data encoding scheme that partitions input data into run length limited data, using a self-synchronizing scrambler with a specific polynomial, and periodic encoding of headers to reduce latency and ensure alignment across serial interfaces.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a serial interface is used to increase bandwidth, then the bandwidth of communication between semiconductor devices increases, but the latency increases

Engineering Contradiction:
ImprovebandwidthVSAvoidlatency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by encoding synchronization information and run-length limited data patterns into the data stream before transmission. The scrambler pre-processes the data to embed synchronization markers that enable the receiving device to automatically align its timing without waiting for explicit synchronization signals, thereby reducing latency while maintaining high bandwidth serial communication

Inventive Principle:
Principle #10Preliminary action

2Loss of time

If a parallel interface is used, then the latency is low, but the bandwidth is limited and transmission problems occur at higher frequencies

Engineering Contradiction:
ImprovelatencyVSAvoidbandwidth
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent replaces the mechanical parallel interface structure with a serial interface that uses sophisticated data encoding (run-length limited coding and scrambling) to achieve performance comparable to parallel interfaces. The encoding scheme creates artificial synchronization markers and controlled data patterns that enable the serial interface to maintain low latency while achieving higher bandwidth, effectively substituting the physical parallel transmission mechanism with an encoded serial one

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS7599396B2Method of encoding and synchronizing a serial interface
Publication Date: 2009.10.06 MOSYS INC
  • US7599396B2 patent drawing
  • US7599396B2 patent drawing
  • US7599396B2 patent drawing

AI summary

The present disclosure is generally directed to a method of communicating data between two or more semiconductor devices. Serial interfaces using the method have a reduction in latency compared to conventional serial interfaces. The method enables features needed for a serial interface, such as limited run lengths and recognizable data boundaries to establish alignment. In addition, a method for synchronizing two or more semiconductor devices through serial interfaces has been presented. This is done by passing a marker data pattern through the system.