Serial Interface Signal Conversion for False Detection Resistance

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Solution Overview

Problem

Existing serial communication interface devices face issues with false detection due to signal degradation, requiring two types of waveform shaping circuits and noise filters to distinguish between chip select and data signals based on pulse widths.

Innovation Solution

A serial communication interface device that transmits and receives signals via a converter and transmitter/receiver, generating and converting signals based on clock and data input, reducing the need for waveform shaping circuits and noise filters by using specific signal patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If two types of waveform shaping circuits and noise filters are used to distinguish chip select signal from data signal based on pulse width, then signal distinction accuracy is improved, but device complexity increases

Engineering Contradiction:
Improvesignal distinction accuracyVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent changes the parameter of signal encoding from pulse width modulation to differential signaling. Instead of using different pulse widths to distinguish chip select from data signals, the invention uses differential voltage levels (single-ended to differential conversion) to encode signal types, thereby eliminating the need for complex waveform shaping circuits while maintaining signal distinction accuracy

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent extracts and eliminates the unnecessary waveform shaping circuits and noise filters from the system. By using differential signaling inherently immune to noise and signal degradation, the invention removes the need for these additional components, thus reducing device complexity while maintaining or improving signal reliability

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If waveform shaping circuits and noise filters are added to handle signal degradation, then detection reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedetection reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent converts the harmful effect of signal degradation into a benefit by using differential signaling. Differential signals are inherently more resistant to noise and signal degradation, so the invention turns the problem of signal degradation into an opportunity to use a more robust signaling method, improving detection reliability without adding complex filtering circuits

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

Instead of adding complex filtering and shaping circuits to handle signal degradation, the patent inverts the approach by using a signaling method (differential encoding) that is inherently resistant to degradation from the outset, thereby improving reliability while reducing device complexity

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentEP4446898B1Serial communication interface device performing signal conversion
Publication Date: 2025.12.10 ABLIC INC
  • EP4446898B1 patent drawingFigure 1
  • EP4446898B1 patent drawingFigure 2
  • EP4446898B1 patent drawingFigure 3

AI summary

A serial communication interface device (20) includes a converter (21), a transmitter (22), and a receiver (23). The converter generates first and second signals based on changes in a clock signal, generates third and fourth signals based on changes in a data signal, and converts into the clock signal and the data signal based on the first to the fourth signals. The transmitter converts the first to the fourth signals into a communication signal and transmits the communication signal to a communication line (TP). The receiver converts the communication signal received from the communication line into the first to the fourth signals. The converter sets the transmission start signal in response to receiving the fourth signal during a period where the clock signal is a first level, and sets the transmission end signal in response to reception of the first signal followed by the third signal.