Serial Line Circuit With Dual-Channel GMR Isolators

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Solution Overview

Problem

Conventional serial line circuits with multiple serial ports are costly due to the high number of opto-isolators required for voltage isolation, which also occupy significant space and consume power, making them expensive to implement and maintain, especially in devices like terminal servers.

Innovation Solution

A serial line circuit design that uses a serial information bus with at most two isolators to route data between programmable devices, employing dual-channel GMR effect isolators and programmable components like FPGAs and CPLDs to reduce the number of isolators needed, enabling efficient data transmission and isolation while minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple opto-isolators are used for voltage isolation in each serial port, then signal isolation and protection are improved, but cost increases substantially

Engineering Contradiction:
Improvesignal isolationVSAvoidcost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines multiple isolation functions into a single opto-isolator by using a multi-channel device that can isolate multiple serial port signals simultaneously. This reduces the total number of opto-isolators needed from 24 (one per port) to just one or a few multi-channel devices, dramatically reducing cost while maintaining isolation reliability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs a universal isolation architecture where a single opto-isolator with multiple channels serves multiple serial ports. This multi-functional approach allows one device to perform the isolation function that previously required many separate devices, reducing both cost and complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple opto-isolators are mounted on the circuit board, then voltage isolation is maintained, but board space is substantially occupied

Engineering Contradiction:
Improvevoltage isolationVSAvoidboard space
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple isolation functions into a single physical component. By using a multi-channel opto-isolator, the board space required for 24 separate opto-isolators is reduced to the space needed for one or a few multi-channel devices, freeing up substantial board real estate.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If multiple opto-isolators are used for signal isolation, then circuit protection is improved, but power consumption increases

Engineering Contradiction:
Improvecircuit protectionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent combines multiple isolation functions into a single opto-isolator device. Since the power consumption of opto-isolators accumulates with each additional device, using one multi-channel opto-isolator instead of many single-channel devices reduces total power consumption while maintaining the same level of circuit protection.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design significantly reduces the number of opto-isolators required, saving costs and board space, while maintaining effective voltage isolation and data transmission efficiency, making it more economical and compact for electronic devices with multiple serial ports.

Implementation Method 1

employing dual-channel GMR effect isolators

Methodology Applied
Scientific EffectGMR effect: Magnetoresistance

Data Source

PatentUS7688869B2Serial line circuit, an apparatus implemented with a serial line circuit, and method thereof
Publication Date: 2010.03.30 ARUBA WIRELESS NETWORKS INC
  • US7688869B2 patent drawing
  • US7688869B2 patent drawing
  • US7688869B2 patent drawing

AI summary

In one embodiment, the invention relates to a serial line circuit that comprises a serial information (SI) bus and at most two isolators interposed between a pair of programmable devices. In the TRANSMIT direction, a first programmable device is configured to multiplex serial data received from a plurality of serial UARTs and to route such data to the second programmable device over the SI bus and through a first isolator. In the RECEIVE direction, the second programmable device is configured to sample data from a plurality of serial interconnects and to route the sampled data to the first programmable device. The sampled data is routed over the SI bus and through a second isolator. The data transmission over the SI bus is in accordance with a proprietary serial transmission protocol described below.