Serial Link Lane Failover With Preserved Error Protection
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Solution Overview
Problem
Conventional recovery mechanisms for serial communication links often require software intervention and may result in degraded error protection capabilities when a lane fails, failing to meet the requirements of highly reliable systems.
Innovation Solution
A system and method for automatic lane failover in serial communication links, where devices can switch from a normal mode to a degraded mode without software intervention by remapping and reformating frames to maintain error protection strength, reducing the impact of lane failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software intervention is used for lane failure recovery, then the system can recover from lane failures, but the recovery mechanism cannot prevent system failure and requires reboot which reconfigures hardware
Solution Approach 1:
The system performs automatic lane failure detection and recovery without external software intervention. The hardware autonomously detects lane failures, remaps communication lanes, and maintains operation in a degraded mode, eliminating the need for software-based recovery mechanisms that require system reboots.
Solution Approach 2:
The patent replaces software-based recovery mechanisms with hardware-based automatic recovery. The physical layer hardware directly performs lane remapping and frame reformatting operations, substituting the software control approach with a hardware-level autonomous system.
2Reliability
If conventional recovery mechanisms are used, then lane failures can be addressed, but error protection capabilities are degraded
Solution Approach 1:
The system dynamically changes frame parameters by reducing the number of data bits while maintaining the same number of error protection bits in degraded mode. This parameter adjustment allows the error protection capability to remain intact even when operating with fewer communication lanes.
3Stability of the object's composition
If the entire link is taken down due to lane failure, then system stability is maintained, but communication continuity is lost
Solution Approach 1:
The communication link is segmented into individual lanes, allowing the system to isolate and remove only the failed lanes while keeping the remaining functional lanes operational. This segmentation enables partial operation continuity rather than complete link shutdown.
Solution Approach 2:
The system maintains continuous communication operation by transitioning to a degraded mode that utilizes remaining functional lanes. The useful action of data transmission continues without interruption, albeit with reduced capacity and reconfigured parameters.
4Manufacturing precision
If manual reconfiguration is required for lane failure recovery, then accurate lane remapping can be achieved, but operation time is increased
Solution Approach 1:
The system pre-configures remapping capabilities in hardware, allowing immediate lane remapping upon failure detection without requiring time-consuming software reconfiguration or system reboots. The hardware is prepared in advance to perform the remapping operation autonomously.
Data Source
AI summary
A system for automatic lane failover includes a first device coupled to a second device via a serial communication link having a plurality of a communication lanes. The devices may communicate by operating the link in a normal mode and a degraded mode. During normal mode operation, the devices may send frames of information to each other via the serial communication link. Each frame of information may include a number of data bits and a number of error protection bits. In response to either device detecting a failure of one or more of the communication lanes, the first device may cause the serial communication link to operate in a degraded mode by removing the one or more failed communication lanes. In addition, each device may reformat and send the frame of information on the remaining communication lanes with fewer data bits and the same number of error protection bits.