Serial Link Receiver Activation for High-Speed Data Detection
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Solution Overview
Problem
Existing receiver circuits in computing systems struggle to accurately detect and adapt to different modes of communication links, leading to potential data loss and latency during transitions between idle and high-speed data modes in serial communication.
Innovation Solution
A receiver subsystem with signal detection, speed detection, and data recovery circuits that monitor the communication link to detect the presence of high-speed data, adjusting reference voltages and activating necessary subcircuits to prevent data loss by aligning clocks and sampling data symbols accurately.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If receiver circuits remain in idle mode to save power, then energy consumption is reduced, but data detection capability is lost when high-speed data arrives
Solution Approach 1:
The receiver circuit is divided into multiple independent subcircuits: an idle mode receiver that consumes minimal power and a high-speed receiver that provides full data detection capability. A mode detection circuit monitors the communication link and dynamically activates the appropriate receiver subcircuit based on whether data is present, thus resolving the contradiction between low power consumption and reliable data detection.
2Reliability
If receiver circuits are always active to detect data, then data detection capability is maintained, but power consumption increases
Solution Approach 1:
The receiver circuit implements dynamic operation by transitioning between different operational states. The mode detection circuit continuously monitors the communication link and dynamically switches between activating the idle mode receiver and the high-speed receiver based on detected data presence, thereby maintaining reliable data detection only when necessary and reducing overall power consumption.
3Loss of time
If the system transitions quickly between idle and high-speed modes, then latency is reduced, but data loss may occur during mode switching
Solution Approach 1:
The mode detection circuit performs preliminary detection of data presence on the communication link before the receiver needs to process actual data. By detecting mode transitions in advance and proactively activating the appropriate receiver subcircuit, the system prepares for incoming data before it arrives, thus reducing latency while preventing data loss that would occur during mode switching.
Data Source
AI summary
A serial data receiver subsystem of a computer system includes a data rate detection circuit and a receiver circuit. The data rate detection circuit is configured to detect that a communication link operates in a high-speed mode rather than in a low-speed mode by detecting that a number of transitions in a serial data stream over a reference period of time exceeds a threshold value. The date rate detection circuit is further configured to activate a data rate detection signal indicating that the communication link operates in the high-speed mode, the data rate detection signal activated in response to detection that the number of transitions in the serial data stream over the reference period of time exceeds the threshold value. The receiver circuit is configured to activate one or more of a plurality of subcircuits included in the receiver circuit in response to activation of the data rate detection signal.