Serial Link Receiver RC Networks Common Mode Feedback
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Solution Overview
Problem
High speed serial link receivers face challenges in accommodating wide termination voltage ranges, minimizing power consumption, maintaining high impedance, rejecting common mode noise, and operating efficiently across various signaling rates and transition densities, while also requiring minimal area and avoiding power sequencing issues.
Innovation Solution
A serial link receiver design incorporating termination resistors, inline resistor-capacitor networks, and a common mode feedback loop with an error amplifier and pull-up/pull-down current sources to monitor and adjust the common mode voltage, ensuring optimal operation and noise rejection with minimal power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If series-connected capacitors are used to couple input signals to the preamplifier, then the receiver can block DC voltage, but the solution does not function well with low signaling rates or long data run lengths and requires prohibitively large amounts of area
Solution Approach 1:
The patent changes the parameter of impedance characteristics by using resistors with different impedance values in series with the capacitors. The first resistor has a first impedance value and the second resistor has a second impedance value, creating a frequency-dependent voltage divider that blocks DC while allowing AC signals to pass with minimal area requirement
Solution Approach 2:
The patent introduces resistors as intermediary elements between the capacitors and the preamplifier inputs. These resistors form voltage dividers that mediate the signal transmission, enabling DC blocking functionality without requiring large capacitor values, thus solving both the DC blocking requirement and the area constraint
2Adaptability or versatility
If the input network is powered from the termination voltage, then the receiver can handle high termination voltages, but much more power must be supplied because all current is drawn from a much higher voltage supply
Solution Approach 1:
The patent implements a feedback mechanism where the common mode voltage is monitored and used to control the biasing of the input network. This feedback allows the receiver to adapt to high termination voltages while maintaining optimal power consumption by dynamically adjusting the operating point based on the actual voltage conditions
Solution Approach 2:
The patent makes the input network dynamic by using voltage-dependent biasing through the resistor-capacitor voltage dividers. The bias voltages are not fixed but are determined by the voltage division ratio, allowing the network to automatically adapt its operating characteristics based on the termination voltage level, thus handling high voltages without excessive power consumption
3Adaptability or versatility
If a high common mode input network is used in parallel with a low common mode one, then the receiver can handle different common mode voltages, but a large amount of power is required in both networks and the parasitic load is doubled
Solution Approach 1:
The patent creates a universal input network that performs multiple functions: it blocks DC, allows AC signal passage, provides common mode rejection, and adapts to different termination voltages. The series RC configuration serves as both a DC blocking element and a frequency-dependent voltage divider, eliminating the need for separate high and low common mode networks
Solution Approach 2:
The patent merges the DC blocking function and the common mode voltage adaptation function into a single integrated RC network. Instead of using parallel high and low common mode networks, the invention combines these functions into one voltage divider configuration that naturally handles both requirements simultaneously, reducing power consumption and parasitic load
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively tolerates wide termination voltages, maintains flat bandwidth across signaling rates, minimizes power consumption, and rejects common mode noise, while reducing the receiver's area and ensuring optimal common mode voltage operation.
Implementation Method 1
The capacitor in parallel with the resistor in each RC network couples the at-speed signal around the resistor, therefore preserving the amplitude of the at-speed signal and preventing the attenuation that would be caused if the signal traveled through the resistor
Implementation Method 2
The direct current (DC-current) from the feedback loop flows through the resistor of the RC networks, which exhibit a high impedance compared to the termination resistors, and the DC-current flow creates a voltage drop across the RC network. The voltage drop across the RC network therefore raises or lowers the input common mode voltage, as needed
Data Source
AI summary
A circuit device and method for designing a serial link receiver, which accommodates a wide input voltage range and provides tolerance to high termination voltages. The receiver is designed with a pair of RC networks connected inline between the input and the preamplifier and a common mode feedback loop, which monitors shifts in the common mode voltage and adjusts the inputs provided to the preamplifier. The circuit device maintains a flat bandwidth to accommodate all signaling rates.