Serial Link Scrambler Reformatting to Prevent PLL Lock Loss
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Solution Overview
Problem
High-speed serial data transmission systems face issues with pathological sequences, which can cause phase locked loop (PLL) loss of lock and bit errors, especially in applications like high-definition television, where occasional occurrences can lead to a negative viewing experience due to frequency drift and inability to completely avoid such sequences with existing encoding and scrambling methods.
Innovation Solution
A system and method that detects pathological sequences in serial data streams, segments and reformats data words by adding framing bits to eliminate consecutive identical bits, ensuring the reformatted data words have a greater bit length than the original, thereby minimizing the occurrence of pathological sequences and preventing PLL lock loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 8/10b encoding is used to ensure minimum transitions, then reliability is improved, but bandwidth is reduced by 20%
Solution Approach 1:
The patent changes the approach from adding redundancy bits (8/10b encoding) to modifying the data sequence itself through scrambling algorithms. This transforms the data representation to achieve minimum transitions without increasing bit width, thereby maintaining bandwidth while improving reliability.
Solution Approach 2:
The patent introduces a scrambler as an intermediary device that processes the data stream before transmission. The scrambler applies a pseudo-random sequence to the data, breaking up pathological sequences and ensuring minimum transitions without requiring additional bandwidth, thus resolving the contradiction between reliability and productivity.
2Productivity
If scrambling algorithms are used to avoid pathological sequences, then bandwidth is maintained, but reliability is insufficient due to incomplete elimination of pathological sequences
Solution Approach 1:
The patent applies preliminary scrambling to the data stream before transmission. By pre-processing the data with a known pseudo-random sequence, the system proactively eliminates pathological sequences that would otherwise cause PLL lock loss, thereby improving reliability while maintaining bandwidth.
Solution Approach 2:
The patent employs a synchronized descrambler at the receiver end that uses the same pseudo-random sequence as the transmitter. This feedback mechanism ensures that the scrambled data is correctly unscrambled, maintaining signal integrity and reliability while preserving bandwidth efficiency.
3Device complexity
If data is transmitted without scrambling, then device complexity is reduced, but pathological sequences cause PLL lock loss and bit errors
Solution Approach 1:
The patent introduces scramblers and descramblers as intermediary devices in the transmission system. These relatively simple pseudo-random sequence generators and synchronizers effectively eliminate pathological sequences and prevent PLL lock loss, improving reliability with minimal increase in device complexity.
Data Source
AI summary
Embodiments provide for a method for eliminating pathological sequences in a serial bit stream. Parallel data words having a first bit length are received. The received data words may be analyzed for a pathological sequence. If a pathological sequence is present in a data word, the data word containing the pathological sequence may be segmented into data segments having bit lengths less than a pathological sequence. The data word may be reformatted by generating reformatted data words having a second bit length. The reformatted data words may contain at least one of the data segments and the second bit length is greater than the first bit length. The reformatting may be performed by adding framing bits to the segments to form the reformatted data words. The reformatted data words are transmitted in place of the data word containing the pathological sequence.