Serial Link SSD Controller with Parallel NAND Channels

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Solution Overview

Problem

Traditional SSD configurations using parallel mode channels to connect multiple NAND dies limit I/O throughput due to the need for each channel to access only one die at a time, leading to inefficiencies in data transfer and increased power consumption.

Innovation Solution

Implementing a main controller connected to a NAND package via one or more serial links, which allows for independent access to multiple subsets of NAND dies, improving I/O throughput and reducing power consumption by maintaining constant performance regardless of the number of dies, while the parallel mode channels operate at lower speeds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If parallel mode channels are used to connect multiple NAND dies, then each channel can connect to multiple dies, but only one die can be accessed at a time per channel, limiting I/O throughput

Engineering Contradiction:
ImproveI/O throughputVSAvoidchannel configuration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system segments the NAND dies into multiple subsets, with each subset connected to a dedicated parallel mode channel. This segmentation allows multiple channels to operate independently and simultaneously access different subsets of dies, thereby multiplying the overall I/O throughput while maintaining manageable channel complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system merges multiple parallel mode channels with a single serial link to the controller. The serial link carries multiplexed data from multiple channels, allowing the controller to access multiple dies simultaneously through what appears to be a single connection, thus improving throughput without proportionally increasing controller interface complexity.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If parallel mode channels operate at high speeds, then data transfer is faster, but power consumption increases

Engineering Contradiction:
Improvedata transfer speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system dynamically adjusts the operating speed of parallel mode channels based on workload requirements. During high-performance operations, channels operate at higher speeds; during idle or low-demand periods, they reduce speed or enter low-power states. This dynamic operation maintains necessary data transfer speeds while minimizing overall power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses periodic activation of parallel mode channels rather than continuous operation. Channels are activated only when data transfer is needed and deactivated during idle periods, creating a periodic on-off pattern that maintains speed performance when needed while significantly reducing average power consumption.

Inventive Principle:
Principle #19Periodic action

3Quantity of substance

If more NAND dies are added to increase storage capacity, then SSD capacity increases, but the number of parallel mode channels required increases proportionally

Engineering Contradiction:
ImproveNAND die countVSAvoidnumber of parallel mode channels
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The system makes each parallel mode channel universal by enabling it to dynamically connect to different subsets of NAND dies through the serial link interface. A single channel can serve multiple dies at different times by multiplexing its connection, eliminating the need for dedicated channels for each die and allowing storage capacity to scale without proportionally increasing channel count.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The serial link acts as an intermediary between the controller and multiple parallel mode channels. It multiplexes data from multiple channels, allowing a single serial interface to manage connections to numerous NAND dies. This intermediary function enables storage capacity to scale independently of the number of physical parallel mode channels required.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11921649B1Multiple parallel mode flash channels with serial link
Publication Date: 2024.03.05 KIOXIA CORP
  • US11921649B1 patent drawing
  • US11921649B1 patent drawing
  • US11921649B1 patent drawing

AI summary

Various implementations described herein relate to systems and methods for a solid state drive (SSD) that includes a first controller and a NAND package. The NAND package includes a plurality of dies grouped into a plurality of subsets. The NAND package includes a second controller operatively coupled to each of the plurality of subsets via a corresponding one of a plurality of parallel mode channels. The first controller is operatively coupled to the NAND package via a serial link.