Serial Link Power Savings with State Retention

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Solution Overview

Problem

As integrated circuit (IC) fabrication technology advances, the increasing number of components on a single IC chip generates more heat, leading to potential slowdowns, malfunctions, or damage, and limits the usage and battery life of portable computing devices, necessitating reduced power consumption without sacrificing link state or increasing latency.

Innovation Solution

The solution involves turning off power-consuming I/O drivers, receivers, and physical layer clocks while retaining the link state in each agent, allowing for quick resumption of link activity, reducing power consumption, and minimizing heat dissipation without impacting system components outside the link physical layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If I/O drivers, receivers, and physical layer clocks are turned off to save power, then power consumption is reduced and heat dissipation is minimized, but link resumption latency increases

Engineering Contradiction:
Improvepower consumptionVSAvoidlink resumption latency
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The patent applies preliminary action by retaining link state information in memory before completely powering off the I/O drivers, receivers, and physical layer clocks. This allows the system to quickly restore the link by reloading the retained state rather than re-establishing it from scratch, thus reducing resumption latency while still achieving power savings when the link is idle

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the operational parameters of the I/O drivers, receivers, and physical layer clocks by transitioning them between active and powered-off states based on link activity. When the link is idle, these components are powered off to reduce power consumption; when link activity is detected or required, they are powered back on, dynamically adjusting power usage to match actual needs

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If additional functionality is integrated onto a single IC chip, then device capabilities are enhanced, but heat generation increases leading to potential malfunction or damage

Engineering Contradiction:
Improvedevice capabilitiesVSAvoidheat generation
Core Design Contradiction:
Adaptability or versatilityVSTemperature

Solution Approach 1:

The patent applies periodic action by implementing dynamic power management that periodically transitions I/O drivers, receivers, and physical layer clocks between active and powered-off states based on link activity detection. This periodic switching allows the system to maintain enhanced functionality when needed while reducing heat generation during idle periods, preventing thermal issues in high-density IC chips

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10712809B2Link power savings with state retention
Publication Date: 2020.07.14 INTEL CORP
  • US10712809B2 patent drawing
  • US10712809B2 patent drawing
  • US10712809B2 patent drawing

AI summary

Methods and apparatus relating to link power savings with state retention are described. In one embodiment, one or more components of two agents coupled via a serial link are turned off during idle periods while retaining link state in each agent. Other embodiments are also disclosed.