Serial Memory Device Active Polling Completion Alert

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Solution Overview

Problem

Current non-volatile memory technologies, such as flash memory, face limitations in power consumption and operation speed, while resistive switching memory technologies like ReRAM and CBRAM offer lower power and higher speeds but require inefficient CPU polling to determine operation completion, leading to resource usage and energy inefficiency.

Innovation Solution

A serial memory device with a command decoder, mode detector, and operation completion indicator that enables active polling mode, allowing the device to autonomously notify the host of operation completion, reducing CPU intervention and energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If CPU polling is used to determine operation completion in resistive switching memory devices, then the device can operate at lower power and higher speeds, but CPU overhead and resource usage increase

Engineering Contradiction:

Improvepower consumptionVSAvoidCPU overhead

Core Design Contradiction:

PowerVSDevice complexity

Solution Approach 1:

The memory device autonomously monitors its own operation completion status through internal circuitry that detects when programming or erasing operations are finished. This self-service mechanism eliminates the need for continuous CPU polling, allowing the device to notify the host system only when operations complete, thereby reducing CPU overhead while maintaining the low-power, high-speed characteristics of resistive switching memory

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent implements a feedback mechanism where the memory device continuously monitors its internal state and provides status updates to the host system. When an operation completes, the device generates an interrupt or status signal that feeds back to the host, enabling event-driven communication instead of constant polling. This feedback approach reduces resource usage while ensuring timely notification of operation completion

Inventive Principle:

Principle #23Feedback

2Measurement precision

If continuous CPU polling is implemented to monitor operation status, then operation completion can be detected, but energy efficiency decreases

Engineering Contradiction:

Improveoperation completion detectionVSAvoidenergy consumption

Core Design Contradiction:

Measurement precisionVSLoss of energy

Solution Approach 1:

Instead of continuous polling, the system transitions to periodic action where the memory device itself periodically checks its operation status and only communicates with the host when necessary. The internal monitoring circuitry continuously tracks operation progress, but external communication occurs only at operation completion or when status changes, significantly reducing energy consumption while maintaining accurate detection capability

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The memory device performs self-monitoring of its operation status through internal circuitry that tracks programming and erasing progress. This self-service approach eliminates the need for external CPU polling, allowing precise detection of operation completion while minimizing energy consumption since the host system is not continuously engaged in status checking

Inventive Principle:

Principle #25Self-service

3Reliability

If traditional flash memory is used, then reliability is achieved, but operation speed and power consumption are limited

Engineering Contradiction:

Improvememory reliabilityVSAvoidoperation speed

Core Design Contradiction:

ReliabilityVSSpeed

Solution Approach 1:

The patent employs parameter changes by transitioning from traditional flash memory technology to resistive switching memory technology, which utilizes different physical mechanisms (resistive switching instead of charge trapping). This fundamental parameter change enables significantly faster operation speeds and lower power consumption while maintaining reliability through carefully designed memory cell structures and control mechanisms specific to resistive switching devices

Inventive Principle:

Principle #35Parameter changes

4Reliability

If traditional flash memory is used, then reliability is achieved, but power consumption increases

Engineering Contradiction:

Improvememory reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The invention changes the fundamental operating parameters by adopting resistive switching memory technology, which requires substantially lower voltages and currents for read, program, and erase operations compared to flash memory. The memory device maintains reliability through robust resistive switching cell design and error correction mechanisms, while achieving lower power consumption due to the inherently more energy-efficient resistive switching mechanism

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS9852090B2Serial memory device alert of an external host to completion of an internally self-timed operation

Publication Date: 2017.12.26 ADESTO TECHNOLOGIES CORP

AI summary

In one embodiment, a method of performing an active polling operation can include: (i) detecting a self-timed operation that is to be executed on a serial memory device; (ii) determining if an active polling mode has been enabled; (iii) determining when the self-timed operation has completed execution on the serial memory device; and (iv) providing a completion indication external to the serial memory device when the self-timed operation has completed execution and the active polling mode is enabled.