Serial Non-Volatile Memory Write Abort Under Low Voltage
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Solution Overview
Problem
Non-volatile semiconductor memories, such as serial EEPROMs and flash EEPROMs, face data corruption issues due to voltage dips during writing processes, especially in motor vehicles, leading to increased error rates and potential recall actions, as they require a higher programming voltage than the supply voltage, which can be critical during starting and stopping phases.
Innovation Solution
A method for operating serial non-volatile semiconductor memories that involves applying a serial write sequence with a clock signal and ensuring a sufficient supply voltage; if the voltage is too low, the write sequence or clock signal is manipulated to be decoded as invalid, aborting the write process early or preventing it from initiating, using additional SPI clock pulses or not transmitting the write sequence at all.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a serial write sequence is transmitted to write data into the semiconductor memory, then data is stored in the memory, but voltage dips during the write process can cause data corruption
Solution Approach 1:
The monitoring of the supply voltage occurs before and during the write sequence transmission. By detecting voltage dips in real-time during the write process, the system can identify critical voltage conditions and abort the write operation before data corruption occurs, thus preventing the harmful effect rather than correcting it after the fact
Solution Approach 2:
The system implements a feedback mechanism where the supply voltage is continuously monitored during the write process, and based on this feedback, the write sequence is dynamically aborted if voltage drops below a threshold. This closed-loop control ensures data integrity by responding to voltage conditions in real-time
2Reliability
If the supply voltage is not high enough to generate the required programming voltage, then the charge pump cannot generate sufficient programming voltage, but increasing the supply voltage is not always feasible
Solution Approach 1:
The system performs a preliminary check of the supply voltage level before initiating the write sequence. By monitoring the supply voltage in advance and comparing it against a threshold, the system can predict whether the charge pump will be able to generate sufficient programming voltage, and abort the write operation proactively to prevent failure
Solution Approach 2:
Instead of requiring the supply voltage to always be high enough for successful programming, the system uses a lower supply voltage threshold for monitoring and comparison. By comparing the supply voltage against a threshold that is lower than the ideal programming voltage requirement, the system can early-detect insufficient voltage conditions and abort before the charge pump is engaged, avoiding the need to increase supply voltage
3Reliability
If the write sequence is aborted early due to low voltage detection, then data corruption is prevented, but the write operation is interrupted
Solution Approach 1:
The system converts the potentially harmful effect of voltage dips into a beneficial early-warning mechanism. By monitoring supply voltage and comparing it against a threshold, the system uses voltage fluctuations as a signal to abort writes proactively, transforming a harmful condition into a protective feature that prevents data corruption
Solution Approach 2:
The voltage monitoring and comparison operation is performed in advance during the transmission of the write sequence, before the critical high-voltage programming phase occurs. This preliminary detection allows the system to abort the write operation early, preventing data corruption while minimizing the impact on productivity by stopping the operation before significant time is consumed
Data Source
AI summary
A method for operating a serial non-volatile semiconductor memory in which, for safely writing data into the semiconductor memory, a serial write sequence is applied to an input terminal. The sequence is formed at least with a sequence of command bits, a sequence of address bits and a sequence of data bytes. During the transmission of the bits of the write sequence, a clock signal is present at a clock input and a sufficiently high supply voltage is present at a supply voltage terminal. On occurrence of a supply voltage that is too low, the write sequence and/or the clock signal is subsequently transmitted incorrectly during the transmission of the write sequence and of the clock signal to the semiconductor memory. In the alternative, the write sequence is not transmitted at all.