Serial Interface Phase Calibration for Data Eye Alignment

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Solution Overview

Problem

High-speed serial interfaces face challenges in clock signal calibration, leading to unreliable data transfer due to uncalibrated clock signals, which result in error-prone data reception.

Innovation Solution

A phase calibration method that involves sweeping phase codes to identify optimal phase codes for aligning the clock signal with the data eye, using a phase interpolator to adjust the clock signal, and applying an average phase code to ensure accurate data sampling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional clock signal calibration methods are used, then the calibration process is simple, but the data transfer reliability is poor due to uncalibrated clock signals

Engineering Contradiction:
Improvedata transfer reliabilityVSAvoidcalibration system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system performs self-calibration by automatically sweeping through phase codes, identifying optimal values based on data eye alignment, and applying corrections without external intervention. The receiver autonomously calibrates its clock signal by analyzing the relationship between clock edges and data transitions, eliminating the need for complex external calibration equipment or manual adjustment while improving data transfer reliability

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The calibration process uses feedback from data sampling results to adjust the clock signal phase. By monitoring whether data bits are correctly aligned with clock edges and using this information to iteratively refine the phase code selection, the system achieves reliable data transfer while maintaining a relatively simple implementation through closed-loop optimization

Inventive Principle:
Principle #23Feedback

2Measurement precision

If phase codes are swept to identify optimal alignment, then the clock signal alignment accuracy is improved, but the calibration time increases

Engineering Contradiction:
Improveclock signal alignment accuracyVSAvoidcalibration time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Instead of exhaustively testing all possible phase codes, the system sweeps through a limited range of phase codes around the expected optimal value. By applying partial action (testing only the most promising phase codes rather than all possibilities), the system achieves sufficient alignment accuracy while significantly reducing calibration time compared to a complete phase sweep

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The system performs preliminary phase calibration by sweeping phase codes during an initialization phase before actual data transfer begins. By conducting this time-consuming alignment process in advance, the system establishes accurate clock-data synchronization upfront, allowing for faster data transfer operations afterward without repeatedly performing full phase sweeps

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11239992B1Efficient phase calibration methods and systems for serial interfaces
Publication Date: 2022.02.01 SAMSUNG DISPLAY CO LTD
  • US11239992B1 patent drawing
  • US11239992B1 patent drawing
  • US11239992B1 patent drawing

AI summary

A phase calibration method includes sweeping phase codes applicable to a serial clock signal, identifying a first, a second, a third, and a fourth phase code, wherein the first phase code causes zero plus a first threshold number of bits extracted from the serial data signal to be a particular value, wherein the second phase code causes all minus a second threshold number of bits extracted from the serial data signal to be the particular value, wherein the third phase code causes all minus a third threshold number of bits extracted from the serial data signal to be the particular value, wherein the fourth phase code causes zero plus a fourth threshold number of bits extracted from the serial data signal to be the particular value, determining an average phase code based on the identified phase codes.