Serial Receiver Bias Switching for Low-Noise LVDS Detection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LVDS and serial devices face issues such as poor power supply rejection ratios, high power consumption, and variations in gain and bandwidth across common mode voltage ranges, as well as inadequate detection of signals within specified threshold limits, leading to excess noise and power consumption.
Innovation Solution
The proposed solution involves a serial receiver design with a biasing circuit, sensing circuit, input stage, output stage, comparator, and loss of signal detector, which generates bias voltages and compares input signals to detect when they fall within specified threshold limits, adjusting operations to reduce noise and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional LVDS devices are used, then serial communication is achieved, but power supply rejection ratio is poor and power consumption is high
Solution Approach 1:
The patent implements dynamic biasing circuits that adjust their operating points based on signal conditions and power supply variations. The biasing circuits are designed to adaptively change their characteristics to maintain optimal performance across different power supply voltages, thereby improving PSRR while managing power consumption dynamically rather than using fixed conventional designs
Solution Approach 2:
The invention changes key operating parameters including bias voltages, current levels, and transistor sizing to optimize the trade-off between power consumption and PSRR. By carefully selecting and adjusting these parameters in the differential pair and biasing circuits, the design achieves better power supply rejection without excessive power draw compared to conventional LVDS devices
2Adaptability or versatility
If conventional serial devices operate across common mode voltage ranges, then versatility is improved, but gain and bandwidth show wide variations
Solution Approach 1:
The patent incorporates feedback mechanisms through the biasing circuits that sense common mode voltage variations and adjust bias conditions accordingly. This feedback approach compensates for common mode voltage changes, maintaining consistent gain and bandwidth across a wide common mode voltage range, thereby resolving the trade-off between versatility and performance consistency
Solution Approach 2:
The design uses dynamic biasing that automatically adjusts to common mode voltage changes, allowing the device to maintain stable gain and bandwidth characteristics across varying common mode conditions. This dynamic adaptation enables wide common mode voltage range operation without sacrificing performance consistency
3Reliability
If conventional receivers process all incoming signals, then no signal loss occurs, but noise and power consumption increase due to signals below threshold limits
Solution Approach 1:
The patent implements a loss of signal detector that performs preliminary detection of signal validity before full signal processing occurs. By detecting signals below threshold limits in advance, the system can prevent unnecessary processing of invalid signals, thereby reducing noise and power consumption while maintaining accurate signal detection through the preliminary detection stage
Solution Approach 2:
The invention extracts and removes signals that fall below threshold limits through the loss of signal detector before they enter the main processing path. This extraction of invalid signals prevents them from contributing to noise and excess power consumption in subsequent stages, while valid signals continue to be processed with high accuracy
Data Source
AI summary
An apparatus, device, and method for high-speed serial communications are provided. An input circuit is operable to receive an input signal, where the input circuit includes transistors forming (i) a first differential pair associated with a first current source and (ii) a second differential pair associated with a second current source. An output circuit is coupled to the input circuit and is operable to generate an output signal based on the input signal. A sensing circuit is operable to estimate a voltage associated with one of the current sources. A comparator is operable to compare the estimated voltage and a reference voltage and to selectively enable one of the differential pairs and disable another of the differential pairs based on the comparison. The differential pairs could be enabled and disabled using a first switch associated with the first differential pair and a second switch associated with the second differential pair.