Serial Bus Redriver Trailing-Edge Boost for Long USB 2.0 Cables

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Solution Overview

Problem

In automotive applications using USB 2.0 serial buses, long cables lead to signal degradation, resulting in high level boost currents that cause false disconnects, increased jitter, and degraded fall times, failing to meet USB 2.0 specifications.

Innovation Solution

The implementation of a serial bus re-driver circuit with a trailing edge boost mechanism that generates current pulses in multiple unit intervals, reducing the need for high level boost currents by applying trailing edge boost pulses to extend the USB 2.0 eye specifications without causing false disconnects or high jitter.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high level boost currents are used to compensate for signal degradation over long cables, then signal strength is improved, but false disconnects and jitter increase

Engineering Contradiction:
Improvesignal strengthVSAvoidfalse disconnects and jitter
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The boost current is divided into multiple segments: a leading edge boost pulse applied at the transition and trailing edge boost pulses applied in subsequent unit intervals. This segmentation allows the total boost to be distributed over time rather than delivered as a single high-magnitude pulse, reducing the peak current while maintaining signal integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The leading edge boost pulse is applied in advance at the signal transition before the data sampling occurs. This preliminary action prepares the signal level early, allowing the signal to settle before sampling without requiring sustained high boost currents that would cause jitter and false disconnects.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If high level boost currents are used to extend USB 2.0 eye specifications, then signal margin is improved, but falling edge times degrade

Engineering Contradiction:
Improvesignal marginVSAvoidfalling edge times
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The boost current is applied periodically in discrete unit intervals rather than continuously. The trailing edge boost pulses are applied in specific unit intervals following the leading edge pulse, creating a periodic pattern that maintains signal margin while allowing the signal to naturally transition during non-boost intervals, preserving falling edge timing.

Inventive Principle:
Principle #19Periodic action

3Reliability

If trailing edge boost pulses are applied in multiple unit intervals, then USB 2.0 eye specifications are extended without false disconnects, but circuit complexity increases

Engineering Contradiction:
Improvesignal integrityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A delay circuit is introduced as an intermediary element to generate the trailing edge boost pulses at the appropriate times. This delay circuit receives the leading edge boost pulse signal and reproduces it with a controlled time delay, enabling the trailing edge boost functionality without requiring complex timing control logic throughout the entire circuit.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11711072B2Serial bus redriver with trailing edge boost circuit
Publication Date: 2023.07.25 TEXAS INSTRUMENTS INC
  • US11711072B2 patent drawing
  • US11711072B2 patent drawing
  • US11711072B2 patent drawing

AI summary

A serial bus re-driver circuit includes an edge detector circuit and a booster circuit. The edge detector circuit is configured to detect a transition of serial bus signal. The booster circuit is coupled to the edge detector circuit, and is configured to switch current to the serial bus signal. The booster circuit includes a leading edge boost pulse generation circuit and a trailing edge boost pulse generation circuit. The leading edge boost pulse generation circuit is configured to switch a first current pulse to the serial bus signal at the transition of the serial bus signal. The trailing edge boost pulse generation circuit is configured to switch a second current pulse to the serial bus signal. The second current pulse is shorter than the first current pulse.