Serially Connected Resistance-Switching Memory Cells for Power Leakage
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Solution Overview
Problem
In semiconductor memory systems, particularly in portable devices, there is a challenge in conserving power as unselected memory cells can leak current, leading to unnecessary power consumption and reduced operational efficiency in 3D memory arrays with reversible resistance-switching elements.
Innovation Solution
The implementation of a non-volatile storage apparatus with serially connected reversible resistance-switching memory cells, where unselected cells are completely unselected by applying unselect signals to their word lines, preventing current leakage and optimizing power usage by using a structure with multiple levels of word lines, bit lines, and selection switches, allowing only selected cells to engage in programming or reading operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If unselected memory cells remain electrically connected in 3D memory arrays, then memory operations can be performed on selected cells, but current leaks through unselected cells causing power consumption
Solution Approach 1:
The patent divides the memory array into multiple independently controllable segments using word lines and bit lines. Each memory cell can be individually selected or unselected by controlling the voltage state of its corresponding word line, allowing precise segmentation of current flow paths and preventing current leakage in unselected cells.
Solution Approach 2:
The patent introduces selection switches as intermediary components between the memory cells and the bit lines. These switches act as mediators that control current flow to selected memory cells while blocking current to unselected cells, thereby preventing power consumption in unselected cells without interfering with operations on selected cells.
2Loss of energy
If selection switches are added to control current flow in memory cells, then power consumption is reduced by preventing current leakage, but device complexity increases
Solution Approach 1:
The selection switches serve multiple functions: they control current flow to selected memory cells, block current to unselected cells, and enable individual cell selection. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity while achieving power consumption reduction.
Solution Approach 2:
The patent combines the selection switch control mechanism with the existing word line and bit line structure. The selection switches are integrated into the memory array architecture and controlled by the same control signals used for memory operations, merging multiple functions into a unified structure that minimizes added complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures that unselected memory cells do not leak current, thereby conserving power and enhancing the operational efficiency of the memory system by isolating them from the current used for programming or reading, thus reducing overall power consumption.
Implementation Method 1
reversible resistance-switching memory elements that may be set to either low or high resistance states. Upon application of sufficient voltage, current, or other stimulus, the reversible resistance-switching memory element switches to a stable low-resistance state
Data Source
AI summary
A non-volatile storage apparatus is proposed that includes a plurality of serially connected non-volatile reversible resistance-switching memory cells, a plurality of word lines such that each of the memory cells is connected to a different word line, a bit line connected to a first end of the serially connected memory cells and a switch connected to a second end of the serially connected memory cells. In one embodiment, the memory cells include a reversible resistance-switching structure comprising a first material, a second material and a reversible resistance-switching interface between the first material and the second material, a channel, and means for switching current between current flowing through the channel and current flowing through the reversible resistance-switching interface in order to program and read the reversible resistance-switching interface. A process for manufacturing the memory is also disclosed.


