Asynchronous Serial Interface Skew Synchronization
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Solution Overview
Problem
Conventional serial data signaling schemes face challenges in reconstructing original messages due to varying path delays (skew) in multi-pin asynchronous interfaces, which can result from environmental factors, limiting data throughput and requiring complex synchronization techniques.
Innovation Solution
A system that synchronizes multiple serial bitstreams using bit and word synchronization modules, which oversample and phase-align the data streams, and correlate them with a framing signal to resolve skew and generate parallel data outputs, employing clock signals and logic modules to ensure consistent data rates and phasing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transmitted across multiple serial data channels to increase throughput, then data rate is improved, but path delay skew increases due to environmental variations
Solution Approach 1:
The patent applies preliminary action by measuring path delay skew between data channels and framing channel during an initialization phase before actual data transmission. The system determines offset values for each data channel and stores them in buffers, preparing the synchronization parameters in advance. This allows the system to compensate for skew effects before they impact data reconstruction accuracy.
Solution Approach 2:
The patent implements feedback by continuously monitoring the skew between data channels and framing channel, measuring the path delay variations caused by environmental factors. The system uses this feedback information to adjust offset values and buffer positions, ensuring that data words are correctly reassembled despite variations in supply voltage, temperature, and other environmental effects.
2Productivity
If bit transfer rate is increased to compensate for serial channel limitations, then throughput is improved, but signal integrity and timing precision deteriorate
Solution Approach 1:
The system performs preliminary skew measurement and offset calculation at initialization, establishing synchronization parameters before high-speed data transmission begins. This allows the system to prepare appropriate buffer positions and timing adjustments in advance, accommodating the limited timing precision at high bit rates.
Solution Approach 2:
The patent introduces buffers as intermediary storage elements between the serial data channels and the parallel output. These buffers absorb timing variations and skew effects, allowing data to be transmitted at high rates while maintaining synchronization accuracy. The buffers act as a mediator that decouples the high-speed transmission from the precision timing requirements.
3Measurement precision
If complex synchronization techniques are used to correct skew, then data accuracy is improved, but device complexity increases
Solution Approach 1:
The patent simplifies the synchronization process by performing all complex skew measurement and offset calculation operations during an initialization phase. Once the offset values are determined and stored, the actual data transmission uses these pre-calculated values with simple buffer positioning and word assembly operations, significantly reducing the complexity of real-time synchronization circuitry.
4Area of stationary object
If serial channels are used to reduce pin count, then space efficiency is improved, but data transfer rate is limited
Solution Approach 1:
The patent applies segmentation by dividing data words into multiple serial channels for parallel transmission. Each channel transmits a portion of the data word simultaneously, and the receiving end reassembles the segments into complete words. This segmentation approach enables higher throughput using serial channels while maintaining space efficiency through reduced pin count compared to traditional parallel interfaces.
Data Source
AI summary
Methods, devices and systems are provided for word synchronizing multiple serial data bitstreams (106) with a serial framing signal (106A). Offset values (420) are determined (512) from the relative locations of predetermined data correlation values (107) stored within the data buffers during a correlation mode to indicate the amount of skew observed between the framing channel and each of serial data channels. Data received during subsequent operation of each data stream is stored a buffer (402), and the framing signal (106A) is monitored to identify a boundary between data words. When a frame boundary occurs, parallel data is extracted from the buffer using the previously-stored offset values to compensate for bit skew between the data and framing channels.