Serial Communication Synchronization for CAN-Linked Semiconductor Devices
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Solution Overview
Problem
Semiconductor devices connected to CAN transceivers experience timing deviations and malfunctions due to asynchronous clock frequencies, leading to sampling errors and incorrect transition states during serial communication.
Innovation Solution
Incorporation of a synchronization part in the communication part of the semiconductor device to monitor transmission or reception data, resetting the clock counter upon detecting frame switching bits, thereby synchronizing the internal state transitions and reducing timing deviations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If asynchronous clock frequencies are used in semiconductor devices connected to CAN transceivers, then device independence and communication flexibility are improved, but timing deviations and sampling errors occur leading to malfunctions
Solution Approach 1:
The synchronization part monitors transmission data or reception data to detect frame switching bits (start bits or stop bits) and uses this feedback to reset the clock counter, ensuring that sampling timing is synchronized with the actual data frame boundaries despite asynchronous clock frequencies between devices
Solution Approach 2:
The synchronization part acts as an intermediary mechanism between the clock generation unit and the data sampling unit, mediating the timing relationship by resetting the clock counter based on detected frame switching bits, thereby eliminating timing deviations without requiring synchronized clock frequencies
2Device complexity
If the clock counter is not reset based on frame switching bits, then device complexity is reduced, but timing deviations accumulate causing sampling errors and incorrect transition states
Solution Approach 1:
The synchronization part automatically resets the clock counter by detecting frame switching bits in the transmitted or received data, making the synchronization process self-service without requiring external intervention or complex control logic, thus maintaining simple device architecture while achieving precise timing
3Measurement precision
If continuous monitoring of transmission data is performed for synchronization, then sampling accuracy is improved, but energy consumption and processing overhead increase
Solution Approach 1:
The synchronization part performs monitoring and counter resetting only at periodic intervals when frame switching bits (start bits or stop bits) are detected in the data stream, rather than continuously, thereby maintaining sampling accuracy while reducing energy consumption and processing overhead during steady-state data transmission
Data Source
AI summary
A semiconductor device includes a reception data input terminal configured such that reception data, which is serial data, is input; a transmission data output terminal configured such that transmission data, which is serial data, is output; and a communication part configured to receive the reception data and transmit the transmission data, wherein the communication part includes: a counter; and a synchronization part configured to monitor the transmission data if the semiconductor device is other than a target device set in the reception data, and reset a count by the counter upon detecting a stop bit and a start bit at frame switching in the transmission data.