Serialized Enable Signal Buffer for Memory Pin Reduction
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Solution Overview
Problem
Computer systems with multiple electronic devices or chips require a large number of physical traces for enable signals, leading to increased cost and complexity in electronic circuit boards, particularly in memory systems where multiple memory devices share a communication bus.
Innovation Solution
The technique of serializing enable signals allows multiple memory chips to share a single lane, converting parallel bits into a serialized form sent over multiple clock cycles, reducing the number of physical traces and input pins on buffer chips, thereby decreasing the number of layers in PCBs and overall implementation costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a separate physical trace is provided for each memory device enable signal, then each memory device can be reliably enabled or disabled, but the number of physical traces and connections increases significantly
Solution Approach 1:
Multiple enable signals that were previously transmitted over separate physical traces are merged into a single shared physical trace. The buffer chip receives one serialized enable signal containing multiple enable bits, each corresponding to a different memory device, and distributes them appropriately to the respective devices.
Solution Approach 2:
The enable signals are transmitted in the time domain rather than the spatial domain. Instead of providing separate spatial paths (physical traces) for each enable signal, the invention uses a single spatial path with temporal multiplexing, sending multiple enable bits sequentially over time on the same trace.
2Device complexity
If the number of physical traces is reduced by using a buffer chip with encoded enable signals, then the complexity of electronic circuit boards decreases, but the number of connections between memory controller and buffer chip is still significant
Solution Approach 1:
Multiple enable connections between the memory controller and buffer chip are merged into a single connection. The buffer chip receives one serialized enable signal containing multiple enable bits, eliminating the need for multiple separate enable signal traces.
Solution Approach 2:
The enable signal transmission transitions from parallel spatial multiplexing (multiple simultaneous connections) to serial temporal multiplexing (single connection used sequentially over time), reducing the number of physical connections required.
3Device complexity
If multiple enable signals share a single physical trace through serialization, then the number of pins and signal traces is reduced, but the enable signals must be sent over multiple clock cycles
Solution Approach 1:
The enable signal is transmitted as a periodic serialized stream of bits synchronized to a clock signal. Each enable bit is sent in sequence over multiple clock cycles, with the buffer chip sampling the signal at appropriate clock edges to reconstruct the enable pattern.
Data Source
AI summary
A method and system for serializing an enable signal designating an electronic device such as a chip to enable or disable in order to reduce the number of pins and physical signal traces required to provide connections for enable signals of multiple electronic devices, such as memory, e.g. Flash and DRAM, is described. The enable signal can be encoded to reduce the number of clock cycles to send the serialized enable signal. A device controller can serialize, encode, and send the enable signal to a decoding module using reduced number of pins and physical connections. Then the decoding module can send a decoded enable signals to individual electronic devices or chips to enable or disable.