Serialized Signal Compression Using Split-Precision Quantization
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Solution Overview
Problem
The existing wireless infrastructure faces challenges in managing the bandwidth expansion caused by digital pre-distortion (DPD) processing in RF transmitters, leading to increased bandwidth requirements over serializer-deserializer (SerDes) communication links, which results in inefficient data transmission.
Innovation Solution
The proposed solution involves signal compression techniques that decompose data signals into separate components with different signal-to-quantization noise ratio (SQNR) requirements, quantizing these components with distinct bit precisions, and using bit-packing and decompression logic to reduce serialized signal bandwidth. This approach is implemented in both the transmit and receive interfaces of a wireless system, allowing for efficient communication between a digital baseband transmitter and an analog front end.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If digital pre-distortion (DPD) processing is applied to compensate for signal path nonlinearities, then signal quality is improved, but bandwidth expansion occurs increasing the TX data bandwidth required over the SerDes com link
Solution Approach 1:
The patent segments the TX data signal into multiple lanes (e.g., 4 lanes) for parallel transmission over the SerDes com link. This segmentation allows the expanded bandwidth from DPD processing to be distributed across multiple channels, reducing the bandwidth requirement per lane while maintaining overall signal quality and reliability
Solution Approach 2:
The patent transitions from single-channel sequential transmission to multi-lane parallel transmission, adding a spatial dimension to the data transmission. By distributing the DPD-processed signal across multiple SerDes lanes, the system accommodates the bandwidth expansion without overloading a single channel
Data Source
AI summary
Signal compression for serialized data bandwidth reduction based on decomposition of a data signal into separate signal components with different SQNR or dynamic range requirements, and quantizing the signal components with different bit precisions. Compression logic decomposes the input data signal into the first/second signal components, quantizes the first component with a pre-defined first bit precision to provide a first quantized data signal, quantizes the second component with a pre-defined second bit precision to provide a second quantized data signal, the second bit precision less than the first bit precision, the first and second quantized data signals bit packed into a compressed digital data signal. At the receive-end, decompression logic bit unpacks the compressed digital data signal into the first/second quantized data signals, and filters/combines the first/second quantized data signals into a decompressed data signal corresponding to the input data signal including the first and second signal components.