Serializer Buffer Current Tuning for Full-Swing High-Speed Signals
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-speed signal paths face delays and jitter issues due to reduced current supply capability of drivers, which prevent full oscillation of signal outputs.
Innovation Solution
The implementation of a circuit with adjustment circuits using P-channel and N-channel MOS transistors, connected in parallel, that adjust the current supply capabilities based on code signals to ensure full oscillation and minimize jitter, even at minimum current supply levels, by using resistor circuits to de-emphasize signal amplitudes and maintain predetermined levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the current supply capability of a driver is lowered to adjust signal timing, then signal timing can be delayed, but the signal output may not fully oscillate leading to jitter
Solution Approach 1:
The patent changes the current supply capability parameter of the driver circuit to adjust signal timing. By controlling the current supplied to the driver, the oscillation frequency and timing can be precisely adjusted without causing jitter, as the driver maintains sufficient current to fully oscillate the signal.
2Adaptability or versatility
If the current supply capability of a driver is reduced for timing adjustment, then timing flexibility is improved, but signal amplitude may decrease preventing full oscillation
Solution Approach 1:
The patent adjusts the current supply capability parameter to achieve timing flexibility while maintaining sufficient signal amplitude for full oscillation. The driver circuit is designed to respond to current changes by adjusting its operating point, allowing timing adjustment without sacrificing oscillation completeness or signal amplitude.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for precise adjustment of signal timing and amplitude, preventing jitter and ensuring full oscillation across varying current supply conditions, enabling reliable high-speed signal transmission.
Implementation Method 1
adjustment circuits using P-channel and N-channel MOS transistors, connected in parallel, that adjust the current supply capabilities based on code signals
Implementation Method 2
using resistor circuits to de-emphasize signal amplitudes and maintain predetermined levels
Data Source
AI summary
Disclosed herein is an apparatus that includes a data serializer including a plurality of first buffer circuits configured to receive a plurality of data, respectively, and a second buffer circuit configured to serialize the plurality of data provided from the plurality of first buffer circuits. At least one of the plurality of first buffer circuits and the second buffer circuit includes: a first circuit configured to drive a first signal node to one of first and second logic levels based on an input signal, the first circuit including a first adjustment circuit configured to adjust a driving capability of the first circuit when the first circuit drives the first signal node to the first logic level; and a second circuit configured to drive the first signal node to other of the first and second logic levels.