Serializer-Based Jitter Generation for Compact Signal Testing

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Solution Overview

Problem

Existing jittered signal generators are complex, occupying significant space on printed circuit boards and lacking simplicity, compactness, and cost-effectiveness.

Innovation Solution

A jittered signal generator using a serializer device, coupled with a binary number generator and a serializer-deserializer (SERDES) device, generates a jittered digital signal by serializing binary numbers with alternating groups of ones and zeroes, employing a barrel shifter for cyclic bit shifting and a sigma-delta shifter with a phase-locked loop for smoothing jitter patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If prior art jittered signal generators using multiplexers, programmable delay circuits, and pattern generators are employed, then jittered signals can be generated for testing, but the device complexity increases and occupies significant space on printed circuit boards

Engineering Contradiction:
Improvejittered signal generation capabilityVSAvoidnumber of electronic modules
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges multiple separate electronic modules (multiplexer, programmable delay circuit, pattern generator) into a single integrated serializer device. The serializer combines the functions of these separate components to generate jittered test signals, thereby reducing device complexity and PCB space occupation while maintaining the capability to generate jittered signals for testing digital communication systems

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The serializer device performs multiple functions: it generates serial data streams, introduces controlled jitter, and provides test signals for various digital communication standards. This multi-functionality replaces several specialized components with a single versatile device, reducing overall system complexity while maintaining comprehensive testing capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If prior art jittered signal generators with multiple electronic modules are used, then jittered signals can be generated, but the area occupied on printed circuit boards increases

Engineering Contradiction:
Improvejittered signal generation capabilityVSAvoidPCB space occupation
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent consolidates multiple discrete electronic modules into a single integrated serializer device, dramatically reducing the physical area required on the printed circuit board. The serializer combines the functionality of multiplexers, delay circuits, and pattern generators into one compact component, enabling jittered signal generation while minimizing PCB space occupation

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8310383B2Generating a jittered digital signal using a serializer device
Publication Date: 2012.11.13 VIAVI SOLUTIONS INC(US)
  • US8310383B2 patent drawing
  • US8310383B2 patent drawing
  • US8310383B2 patent drawing

AI summary

A serializer device is used for generation, from a parallel digital signal, of a clock signal or a serial binary data signal having a pre-determined amount of jitter. A binary number having consecutive groups of ones and zeroes, when serialized by the serializer device, produces a clock signal. By varying the number of ones and zeroes on the binary number, a pre-determined amount of jitter can be generated. Use of sigma-delta modulation in combination with a phase-locked loop circuitry allows one to obtain a smoothly varying jitter of the output signal.