Serializer Circuit with Pre-Emphasis for Low-Voltage Data Transfer
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Solution Overview
Problem
Data serializer circuits face challenges in efficiently transferring parallel data to serial format across devices due to signal degradation from manufacturing and operating condition variations, and existing solutions like Gilbert-style converters have area and power consumption issues, as well as scaling limitations at lower operating voltages.
Innovation Solution
The serializer circuit employs a pre-emphasis circuit and common mode voltage adjust circuit with programmable components, utilizing phase-different clock signals to transfer data serially, and eliminates current mirrors to reduce area and power consumption while enabling scaling to lower voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Gilbert-style converters are used for data serialization, then data transfer functionality is achieved, but area consumption and power consumption increase
Solution Approach 1:
The patent extracts and eliminates the current mirror circuitry from the Gilbert-style converter architecture. By removing this problematic component, the design achieves data serialization functionality while significantly reducing both area consumption and power consumption that were inherent in conventional Gilbert-style implementations.
Solution Approach 2:
The patent employs a simplified circuit architecture that uses basic switching elements and resistors instead of complex current mirrors. This approach uses simpler, less resource-intensive components to achieve the same functional outcome, thereby reducing overall circuit area and power requirements.
2Reliability
If Gilbert-style converters are used for data serialization, then data transfer functionality is achieved, but power consumption increases
Solution Approach 1:
The patent extracts and eliminates the current mirror circuitry from the Gilbert-style converter architecture. By removing this problematic component, the design achieves data serialization functionality while significantly reducing both area consumption and power consumption that were inherent in conventional Gilbert-style implementations.
Solution Approach 2:
The patent employs a simplified circuit architecture that uses basic switching elements and resistors instead of complex current mirrors. This approach uses simpler, less resource-intensive components to achieve the same functional outcome, thereby reducing overall circuit area and power requirements.
3Productivity
If conventional serializer circuits are used, then data transfer is achieved, but signal integrity degrades due to manufacturing and operating condition variations
Solution Approach 1:
The patent implements a pre-emphasis circuit that boosts the signal amplitude before transmission. This preliminary action compensates for anticipated signal degradation due to manufacturing variations and operating conditions, ensuring that the signal maintains its integrity throughout the transmission process.
Solution Approach 2:
The patent employs adjustable circuit parameters including pre-emphasis strength and common-mode voltage levels that can be optimized for different operating conditions. This allows the circuit to adapt to manufacturing variations and maintain signal integrity across different process corners and operating environments.
4Productivity
If conventional serializer circuits are used, then data transfer is achieved, but scalability to lower voltages is limited
Solution Approach 1:
The patent employs adjustable circuit parameters including pre-emphasis strength and common-mode voltage levels that can be optimized for different operating conditions. This allows the circuit to adapt to manufacturing variations and maintain signal integrity across different process corners and operating environments.
Solution Approach 2:
The patent implements dynamic circuit elements including switched-capacitor structures and voltage-controlled switching that enable the circuit to operate efficiently at lower voltages. The dynamic nature of these components allows them to maintain proper functionality across a wider voltage range compared to static conventional designs.
Data Source
AI summary
Some embodiments include apparatus and methods having an output line, clock nodes to receive clock signals, the clock signals being out of phase with each other, and selector circuits to receive data in parallel. In at least one embodiment, the selector circuits are responsive to the clock signals to transfer the data serially to the output line. Such apparatus and methods can also include a control unit to influence a portion of a signal that represents at least a portion of the data at the output line. Additional apparatus and methods are described.