Series Chip Power Circuit for Inter-Chip Communication Voltage
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Solution Overview
Problem
Existing series power supply circuits for computing devices require complex transformer designs and multiple power interfaces or signal level conversion devices, leading to high manufacturing costs and instability due to voltage inconsistencies between chips, which complicates the deployment process and increases energy consumption.
Innovation Solution
A series circuit design that connects chips in series with a power supply terminal and ground terminal, using a communication line connected to a target connection point via a third connection line to ensure consistent voltage for communication between adjacent chips, eliminating the need for auxiliary power supplies and signal level conversion devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel computing architecture is used to improve computing performance, then computing performance increases, but device complexity and manufacturing cost increase
Solution Approach 1:
The computing system is divided into multiple independent computing chips, each capable of parallel processing. The power supply system is segmented into a main power supply and auxiliary power supplies that can be selectively connected, allowing the system to scale from single-chip to multi-chip configurations without requiring complete redesign of the power architecture.
Solution Approach 2:
The power supply circuit is designed with multi-functionality to serve both single-chip and multi-chip configurations. The same main power supply can provide power to one or multiple chips, and the auxiliary power supplies can be dynamically connected or disconnected based on whether communication between chips is required, eliminating the need for different power architectures for different computing modes.
2Adaptability or versatility
If auxiliary power supplies are added to each chip to ensure communication voltage requirements, then communication capability is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The auxiliary power supply function is extracted from individual chips and implemented as a shared resource. Instead of each chip having its own dedicated auxiliary power supply, a common auxiliary power supply is designed that can serve multiple chips simultaneously, reducing the total number of power supply components while maintaining the ability to provide required voltage for inter-chip communication.
Solution Approach 2:
Multiple auxiliary power supply functions are merged into a single shared auxiliary power supply unit. This consolidated design provides power to multiple chips through a common circuit architecture, reducing device complexity and manufacturing cost while maintaining the capability to support communication between any pair of chips in the system.
3Reliability
If signal level conversion devices are added to ensure voltage consistency between chips, then voltage consistency is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The power supply circuit is designed to establish equipotential connections between chips during communication operations. By controlling the auxiliary power supply to activate simultaneously with the main power supply and maintaining synchronized voltage levels, the system creates equipotential conditions across all chips, eliminating the need for signal level conversion devices while ensuring reliable voltage consistency for communication.
4Adaptability or versatility
If multiple power interfaces are used to support both operation and communication voltages, then voltage requirements are satisfied, but device complexity and manufacturing cost increase
Solution Approach 1:
The power supply circuit is designed with multi-functionality to serve both single-chip and multi-chip configurations. The same main power supply can provide power to one or multiple chips, and the auxiliary power supplies can be dynamically connected or disconnected based on whether communication between chips is required, eliminating the need for different power architectures for different computing modes.
Solution Approach 2:
The power supply system incorporates dynamic switching capability that allows it to adapt its configuration based on operational requirements. The auxiliary power supplies can be selectively connected or disconnected through switching circuits, enabling the system to dynamically transition between power distribution modes for single-chip operation and multi-chip communication, thereby satisfying different voltage requirements without requiring multiple fixed power interfaces.
Data Source
AI summary
The present invention discloses a series circuit and a computing device, including: a power supply terminal for providing voltage for a plurality of chips disposed on the computing device; a ground terminal disposed at one end of each of the plurality of chips relative to the power supply terminal; and a first connection line for separately connecting a first predetermined number of chips of the plurality of chips in series, wherein a communication line is connected between adjacent chips of the first predetermined number of chips, a portion of the communication line is connected to a target connection point, which is disposed on the first connection line and adapted to the adjacent chips, via a third connection line, and the voltage at the target connection point is greater than or equal to the minimum voltage required for communication between the adjacent chips. Such circuit structure can be used to provide the voltage required for communication between adjacent chips, while ensuring the same voltage between chips. Therefore, there is no need to provide an auxiliary power supply for each chip or to use a number of signal level conversion devices, thereby reducing the costs.