Series Chip Power Circuit for Stable Inter-Chip Communication

Solution Overview

Problem

Existing series power supply circuits for computing devices require complex transformer designs and multiple auxiliary power supplies or signal level conversion devices to maintain consistent voltage between chips, leading to high manufacturing costs and instability.

Innovation Solution

A series circuit design that connects chips in series with a power supply terminal and ground terminal, using a communication line connected to a target connection point via a second connection line to ensure consistent communication voltage between adjacent chips, eliminating the need for auxiliary power supplies and signal level conversion devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple auxiliary power supplies or signal level conversion devices are added to ensure consistent voltage between chips, then communication reliability between chips is improved, but device complexity and manufacturing cost increase

Engineering Contradiction:

Improvecommunication reliabilityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the power supply function and signal level conversion function into a single integrated circuit module. This module provides both power to the chips and performs level conversion for communication signals, eliminating the need for separate auxiliary power supplies and signal level conversion devices. The integration reduces component count, simplifies circuit structure, and lowers manufacturing cost while maintaining reliable communication between chips at different voltage levels.

Inventive Principle:

Principle #5Merging (Combining)

2Reliability

If multiple auxiliary power supplies or signal level conversion devices are added to ensure consistent voltage between chips, then voltage consistency between chips is improved, but manufacturing cost increases

Engineering Contradiction:

Improvevoltage consistencyVSAvoidmanufacturing cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent combines the power supply function and signal level conversion function into a single integrated circuit module. This module provides both power to the chips and performs level conversion for communication signals, eliminating the need for separate auxiliary power supplies and signal level conversion devices. The integration reduces component count, simplifies circuit structure, and lowers manufacturing cost while maintaining reliable communication between chips at different voltage levels.

Inventive Principle:

Principle #5Merging (Combining)

3Ease of operation

If traditional transformer design is used to enable operation under positive voltage, then chip operation is enabled, but deployment process becomes complicated and cost increases

Engineering Contradiction:

Improvechip operationVSAvoiddeployment complexity

Core Design Contradiction:

Ease of operationVSDevice complexity

Solution Approach 1:

The patent extracts the complex transformer design from the power supply system and replaces it with a simplified direct power supply approach. By using the integrated circuit module to directly provide power to chips and handle signal level conversion electronically, the patent eliminates the need for transformers and their associated complex deployment processes, while still enabling chips to operate under positive voltage conditions.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS11243588B2Series circuit and computing device

Publication Date: 2022.02.08 HANGZHOU CANAAN INTELLIGENCE INFORMATION TECH CO LTD

AI summary

A series circuit and a computing device includes a power supply terminal, a ground terminal and a first connection line for separately connecting a first predetermined number of chips of the plurality of chips in series. A communication line is connected between adjacent chips of the first predetermined number of chips. A portion of the communication line is connected to a target connection point, which is disposed on the first connection line and adapted to the adjacent chips, via a second connection line, and the voltage at the target connection point is greater than or equal to the minimum voltage required for communication between the adjacent chips.