Series JFET Switching Circuit for Balanced Blocking Voltage
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Solution Overview
Problem
The existing switching devices for high operating voltages using a series connection of JFETs face issues due to non-uniform distribution of blocking voltage across JFETs, leading to potential damage of the uppermost transistor.
Innovation Solution
A switching device with a series connection of JFETs, where a stabilisation circuit and an additional circuit are used to balance and stabilise the gate voltages, ensuring symmetrical voltage loading and synchronous switching behavior across all JFETs, with the additional circuit drawing the gate potential of the uppermost JFET to its drain potential, reducing voltage stress on it.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If protective diodes are connected to gate connections of JFETs in a series configuration, then the JFETs are protected from voltage spikes, but non-uniform distribution of blocking voltage arises due to different junction capacitances
Solution Approach 1:
The patent introduces asymmetry by connecting an additional diode specifically to the gate connection of the uppermost JFET, creating a symmetric voltage loading condition despite the asymmetric physical positions of the JFETs in the series chain. This compensates for the inherent asymmetry in capacitance values caused by the series configuration.
Solution Approach 2:
The additional diode connected to the uppermost JFET's gate creates equipotential conditions that balance the voltage distribution across all gate connections. By providing an alternative path for charge equalization, the system achieves uniform voltage loading despite differences in junction capacitances.
2Power
If JFETs are arranged in series to achieve high blocking voltage, then the switching device can handle high voltages, but the uppermost JFET takes up the complete voltage and may be destroyed
Solution Approach 1:
The additional diode acts as an intermediary element that mediates the voltage distribution between the uppermost JFET and the rest of the series chain. It provides a charge equalization path that prevents the uppermost JFET from bearing the complete voltage stress.
Solution Approach 2:
The additional diode provides beforehand cushioning by pre-establishing a charge equalization path that protects the uppermost JFET before voltage stress occurs. This protective measure is built into the circuit configuration to prevent voltage overload.
3Adaptability or versatility
If different capacitances act on gate connections of JFETs, then the dynamic division of blocking voltage is influenced, but synchronous switching behavior of all JFETs is compromised
Solution Approach 1:
The additional diode creates a feedback mechanism for charge equalization among the gate connections. When voltage imbalances occur due to different capacitances, the diode provides a corrective path that restores equilibrium, enabling synchronous switching behavior despite varying capacitance values.
Data Source
AI summary
The invention relates to a switching device for switching a current between a first connection (1) and a second connection (2), comprising a series connection of at least two JFETs (J1-J6), of which a lowest JFET (J1) is connected to the first connection (1), or the lowest JFET (J1) is connected in a cascade circuit to the first connection (1) via a control switch (M), and at least one further JFET (J2-J5), which is connected in series to the lowest JFET (J1), wherein the JFET (J6) farthest away from the lowest JFET (J1) is referred to as the uppermost JFET (J6) and is connected with the drain connection to the second connection (2), and wherein a stabilization circuit (D11-D53) is connected between the gate connections of the JFETs (J1-J6) and the first connection (1) in order to stabilize the gate voltages of the JFETs (J1-J6). An additional circuit (4), which draws the potential at the gate connection (G6) of the uppermost JFET (J6) to the potential at the drain connection (D6) of the uppermost JFET (J6), is switched between the gate connection (G6) of the uppermost JFET (J6) and the second connection (2).