Series MIM Capacitor Voltage Distribution

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Solution Overview

Problem

The reliability of metal-insulator-metal (MIM) capacitors as decoupling capacitors in integrated chips is limited by their dielectric layer's voltage breakdown limit, which is often exceeded by modern supply voltages, leading to damage and increased signal delay.

Innovation Solution

Connecting multiple MIM structures in series between a supply voltage and a ground voltage, using lower and upper metal interconnect structures within inter-level dielectric layers, to distribute the voltage potential and keep each MIM structure's voltage below its reliability limit, thereby preventing damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single MIM capacitor is used as a decoupling capacitor, then the capacitance value is sufficient, but the supply voltage exceeds the dielectric layer's voltage breakdown limit causing damage

Engineering Contradiction:
ImproveMIM capacitor reliabilityVSAvoidvoltage breakdown damage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides a single large-capacitance MIM capacitor into multiple smaller MIM capacitors connected in series. Each capacitor experiences a fraction of the total supply voltage, keeping individual voltages below the dielectric breakdown limit while maintaining the required total capacitance for decoupling applications.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple MIM capacitors are connected in series, then the voltage across each capacitor is reduced below the breakdown limit, but the device complexity increases

Engineering Contradiction:
ImproveMIM capacitor reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple MIM capacitors into a single integrated decoupling structure that functions as one unified component. The series-connected capacitors are merged into a modular unit with shared control and packaging, reducing the overall system complexity despite the increased number of individual capacitor elements.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution allows MIM structures to be used as decoupling capacitors in systems with supply voltages greater than their individual reliability limit, reducing switching noise and maintaining operational frequency by distributing the voltage potential across multiple capacitors.

Implementation Method 1

Connecting multiple MIM structures in series between a supply voltage and a ground voltage, using lower and upper metal interconnect structures within inter-level dielectric layers, to distribute the voltage potential and keep each MIM structure's voltage below its reliability limit

Methodology Applied
Scientific EffectSeries circuit voltage distribution: Ohm's Law

Implementation Method 2

This solution allows MIM structures to be used as decoupling capacitors in systems with supply voltages greater than their individual reliability limit, reducing switching noise and maintaining operational frequency by distributing the voltage potential across multiple capacitors

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS10622300B2Series MIM structures
Publication Date: 2020.04.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10622300B2 patent drawing
  • US10622300B2 patent drawing
  • US10622300B2 patent drawing

AI summary

The present disclosure, in some embodiments, relates to an integrated chip. The integrated chip includes a lower interconnect layer disposed within a first inter-level dielectric (ILD) layer over a substrate. A plurality of MIM (metal-insulator-metal) structures are disposed within a second inter-level dielectric (ILD) layer over the lower interconnect layer. An upper interconnect layer is coupled to the plurality of MIM structures at first locations that are directly over second locations at which the lower interconnect layer is coupled to the plurality of MIM structures. One or both of the lower interconnect layer and the upper interconnect layer are comprised within a conductive path that electrically couples the plurality of MIM structures in a series connection.