Series Magnetic Tunnel Junctions With Common Transistor

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Solution Overview

Problem

Current MRAM systems face challenges in reducing the number of transistors used, which limits device pitch and density, and require improved methods for writing data efficiently and accurately.

Innovation Solution

Configuring multiple magnetic tunnel junctions (MTJs) in series or parallel configurations with a common transistor, using alternating current (AC) to reduce switching voltage and improve write error rates, and varying MTJ resistances and magnetic anisotropies to achieve distinct resistance states for data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If each MTJ has individual transistors, then switching control is simplified, but device pitch and density are limited

Engineering Contradiction:
Improveswitching controlVSAvoiddevice pitch
Core Design Contradiction:
Ease of operationVSArea of moving object

Solution Approach 1:

Multiple MTJs (first MTJ and second MTJ) are merged into a single memory cell and share a common transistor. The MTJs are connected in parallel between bit line and source line, allowing them to be controlled by the same transistor while maintaining individual addressability through selective writing schemes.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory cell is segmented into multiple functional units (first MTJ, second MTJ, common transistor) that can be independently controlled. Each MTJ can be selectively written to by applying appropriate voltage patterns, enabling independent data storage while sharing the transistor resource.

Inventive Principle:
Principle #1Segmentation

2Productivity

If multiple MTJs are configured in series or parallel, then memory array density increases, but device complexity increases

Engineering Contradiction:
Improvememory array densityVSAvoidconfiguration complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The common transistor serves multiple functions: it controls both the first MTJ and the second MTJ, enabling a single transistor to manage multiple storage elements. This multi-functionality reduces the overall transistor count while maintaining control capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent varies the resistance characteristics of different MTJs (first MTJ has first resistance, second MTJ has second resistance) to create distinguishable states. By changing resistance parameters, the system achieves multiple resistance states for data storage without requiring additional transistors.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If AC current is used for writing, then switching voltage is reduced and write error rates improve, but manufacturing precision requirements increase

Engineering Contradiction:
Improvewrite error rateVSAvoidMTJ resistance matching
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Each MTJ is designed with specific local characteristics (first MTJ has first resistance, second MTJ has second resistance) that are deliberately different. This local quality differentiation allows selective addressing and writing to specific MTJs using AC current patterns, while the common transistor provides unified control.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the number of transistors required, increases memory array density, and enhances data writing efficiency and accuracy by allowing for multiple resistance states and improved switching characteristics.

Implementation Method 1

Due to the spin-polarized electron tunneling effect, the electrical resistance of the cell changes due to the relative orientation of the magnetization of the two layers

Methodology Applied
Scientific EffectSpin-polarized electron tunneling:

Implementation Method 2

a vertical stack of MTJs is connected to an AC source with frequency that is selectively tuned to be close to the intrinsic free-layer precession frequencies of the individual devices

Methodology Applied
Scientific EffectFree layer precession: Precession

Data Source

PatentUS10403343B2Systems and methods utilizing serial configurations of magnetic memory devices
Publication Date: 2019.09.03 INTEGRATED SILICON SOLUTION CAYMAN INC
  • US10403343B2 patent drawing
  • US10403343B2 patent drawing
  • US10403343B2 patent drawing

AI summary

A memory cell apparatus is provided. The apparatus comprises two or more magnetic tunnel junctions (MTJs), including a first MTJ having a first magnetic characteristic and a first electrical characteristic and a second MTJ having a second magnetic characteristic and a second electrical characteristic. The first magnetic characteristic is distinct from the second magnetic characteristic. The apparatus further comprises a transistor having three terminals, where the first MTJ is coupled to a first terminal of the three terminals and a metallic separator coupling the first MTJ with the second MTJ. The first MTJ and the second MTJ are arranged in series.