Series Battery Pack Bypass Switching With Staggered MOSFET Turn-On

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Solution Overview

Problem

In battery systems, simultaneous turn-on of first and second switches can cause direct short-circuiting of battery packs, leading to permanent failure and safety risks due to limited current handling capacity of individual MOS transistors.

Innovation Solution

Implementing multiple controllable switching transistors in parallel for both switches, with staggered turn-on moments to prevent simultaneous activation, and using a controller to manage these transistors through distinct drive signals to ensure safe operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If multiple MOS transistors are connected in parallel to increase current handling capacity, then the current bearing capability is improved, but the risk of simultaneous turn-on causing short circuit increases

Engineering Contradiction:
Improvecurrent handling capacityVSAvoidshort circuit risk
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies preliminary action by setting different turn-on moments for the first and second switches before actual operation. The controller is configured to turn on the first switch at a first moment and the second switch at a second moment that is different from the first moment. This preliminary timing arrangement prevents simultaneous turn-on and potential short circuits while maintaining the parallel MOS transistor configuration for high current capacity.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If a single MOS transistor is used for the first switch and second switch, then the device complexity is reduced, but the current handling capacity is limited

Engineering Contradiction:
Improveswitch structure simplicityVSAvoidcurrent bearing capability
Core Design Contradiction:
Device complexityVSPower

Solution Approach 1:

The patent applies segmentation by dividing each switch (first switch and second switch) into multiple MOS transistors connected in parallel. Instead of using a single MOS transistor that would be limited in current capacity, the system uses multiple transistors (e.g., four MOS transistors per switch) working together to handle high current while maintaining manageable device complexity through modular arrangement.

Inventive Principle:
Principle #1Segmentation

3Power

If the first switch and second switch are simultaneously turned on to handle high current, then the power handling is improved, but direct short circuiting of the battery pack occurs

Engineering Contradiction:
Improvepower handling capacityVSAvoidshort circuit damage
Core Design Contradiction:
PowerVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by implementing a control mechanism that actively prevents the harmful condition of simultaneous switch turn-on. The controller is specifically configured to turn on the first switch at a first moment and the second switch at a second moment different from the first moment, creating a timing-based protective action that counteracts the potential short circuit before it can occur, while still allowing high power handling through sequential operation.

Inventive Principle:
Principle #9Preliminary anti-action

Data Source

PatentUS20240021890A1Battery system, drive system, and energy storage container
Publication Date: 2024.01.18 HUAWEI DIGITAL POWER TECH CO LTD
  • US20240021890A1 patent drawing
  • US20240021890A1 patent drawing
  • US20240021890A1 patent drawing

AI summary

This application discloses a battery system and an energy storage container. The battery system includes a plurality of battery packs that are connected in series. Each battery pack corresponds to one first switch that is connected in series to the battery pack. Each battery pack corresponds to one second switch that is connected in parallel to the battery pack. Each battery pack is connected in series to the corresponding first switch and then connected in parallel to the second switch. The first switch includes a plurality of controllable switching transistors that are connected in parallel. The second switch includes a plurality of controllable switching transistors that are connected in parallel. The plurality of controllable switching transistors included in the first switch correspond to at least two different turn-on moments. The plurality of controllable switching transistors included in the second switch correspond to at least two different turn-on moments.