Series Semiconductor Package Bus Bar Layout for Low Inductance
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Solution Overview
Problem
In semiconductor devices connected in series, the path of the bus bar for guiding one terminal to the other becomes long, leading to increased inductance.
Innovation Solution
A semiconductor device configuration that includes a first semiconductor package with a first terminal and a first output terminal, a second semiconductor package with a second output terminal, and a bus bar connecting the two, where the bus bar extends from the second terminal in the direction of the first terminal, reducing inductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If semiconductor packages are connected in series with traditional bus bar routing, then electrical connection is achieved, but inductance increases due to long current paths
Solution Approach 1:
The bus bar is extended from the second terminal in a direction toward the first surface where the first terminal is provided, creating a three-dimensional current path that reduces inductance by optimizing the spatial arrangement of current flow rather than following conventional planar routing
Solution Approach 2:
The invention changes the geometric parameters of the bus bar routing, specifically extending it from the second terminal toward the first surface to minimize the loop area and reduce inductance, transforming the physical configuration to achieve lower electrical inductance
Data Source
AI summary
A first terminal is provided on a first surface of the first semiconductor package and electrically connected to a first pole side of the first semiconductor chip. A first output terminal is provided on a second surface of the first semiconductor package and electrically connected to a second pole side of the first semiconductor chip. A second output terminal is provided on a third surface of the second semiconductor package and electrically connected to the first pole side of the second semiconductor chip. A second terminal is provided on the third surface of the second semiconductor package and electrically connected to the second pole side of the second semiconductor chip. The first output terminal is connected to the second output terminal. A bus bar is connected to the second terminal and extends from the second terminal in a direction of the first surface on which the first terminal is provided.