Serpentine Double Gated Diode Array for Stress Defect Detection

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Solution Overview

Problem

Detecting and isolating stress-induced defects in n-channel metal oxide semiconductor (NMOS) transistors in integrated circuits is challenging due to their invisible signature and sensitivity to variations in active area and gate configurations, making it difficult to confirm defects without advanced analysis like transmission electron microscopy.

Innovation Solution

A serpentine double gated diode array is configured to maximize sensitivity to stress-induced defects, allowing for electrical testing and estimation of defect density, and is compatible with scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM) for defect isolation, enabling accurate detection and characterization of stress-induced defects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If stress memorization techniques and tensile stress pre-metal dielectric liners are used to improve on-state drive current, then drive current is improved, but stress induced defects increase causing excess leakage current

Engineering Contradiction:

Improveon-state drive currentVSAvoidleakage current

Core Design Contradiction:

PowerVSReliability

Solution Approach 1:

The invention segments the detection function by creating separate test structures (diodes with serpentine gates) that are distinct from the functional transistors. This allows independent characterization of stress-induced defects without affecting the operational transistors, enabling measurement of leakage current caused by stress defects separately from normal operation.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The invention introduces diodes as intermediary test structures that mediate between the stressed regions and the measurement equipment. These diodes are formed in the same stressed regions as the transistors but serve solely as sensors for stress-induced defects, allowing indirect measurement of stress effects without disrupting the functional transistor performance.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Power

If tensile stress levels are increased above 1000 MPa to improve drive current, then drive current is improved, but detection of stress induced defects becomes more difficult

Engineering Contradiction:

Improvedrive currentVSAvoiddefect detection

Core Design Contradiction:

PowerVSDifficulty of detecting and measuring

Solution Approach 1:

The invention creates measurable electrical signal changes (analogous to color changes) that indicate the presence of stress-induced defects. By measuring leakage current and capacitance variations in the diode test structures, the invention transforms invisible stress defects into detectable electrical signals that can be correlated with defect density.

Inventive Principle:

Principle #32Color changes

Solution Approach 2:

The invention replaces mechanical/physical analysis methods (such as transmission electron microscopy) with electrical measurement methods. By using electrical tests on diode structures to detect stress-induced defects, the invention substitutes complex mechanical imaging with simpler electrical measurements that can be performed on completed devices.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Ease of manufacture

If standard diode structures are used for testing, then manufacturing is simple, but sensitivity to stress induced defects is insufficient

Engineering Contradiction:

Improvestructure fabricationVSAvoiddefect sensitivity

Core Design Contradiction:

Ease of manufactureVSMeasurement precision

Solution Approach 1:

The invention introduces dynamic gate configurations (serpentine gates with multiple segments that can be independently controlled) to the diode test structures. This dynamic control allows optimization of the electric field distribution to maximize sensitivity to stress-induced defects while maintaining manufacturability through standard photolithography patterns.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The invention adds spatial dimensionality to the gate structure by using serpentine configurations with multiple segments arranged in specific geometries. This dimensional complexity in the gate layout enhances the interaction between the electric field and stress-induced defects, improving measurement sensitivity without significantly complicating the fabrication process.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS7968878B2Electrical test structure to detect stress induced defects using diodes

Publication Date: 2011.06.28 TEXAS INSTRUMENTS INC

AI summary

A serpentine double gated diode array for monitoring stress induced defects is disclosed. The diode array is configured with adjacent gate segments and gate loops in close proximity to active areas to maximize a sensitivity to stress induced defects. The diode array is compatible with conventional electrical testing. Scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM) may be used to isolate individual stress induced defects. Variations in the gate configuration allow estimation of effects of circuit layout on formation of stress induced defects.