Server Board Compatibility Verification Before Power-On

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Solution Overview

Problem

Conventional server systems lack a method to verify compatibility between the management board and system board, leading to undetected incompatibilities that cause errors or damage only after power-on and boot-up, requiring thorough analysis to identify the issue.

Innovation Solution

A server system with a management circuit and processing circuit that includes control circuits, memories, and power control circuits to verify compatibility by comparing verification values and controlling power supply based on verification results, storing identification information in lists to manage power-up and prevent incompatible circuits from starting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If compatibility verification between management board and system board is not implemented, then device complexity is reduced, but reliability deteriorates due to undetected incompatibilities causing errors or damage

Engineering Contradiction:
Improvecompatibility verificationVSAvoidverification system
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements compatibility verification before the system board is powered on by comparing verification values stored in memories of both the management board and system board. This preliminary action detects incompatibilities in advance, preventing errors and damage that would occur during normal operation, thereby resolving the contradiction between reliability improvement and device complexity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If compatibility verification is performed during boot-up, then reliability is improved, but boot verification time increases

Engineering Contradiction:
Improvecompatibility detectionVSAvoidboot verification time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The verification process is executed during the initial power-on phase before the system board fully boots, using pre-stored verification values in memories. By performing compatibility checking at this early stage rather than during full boot-up, the system achieves reliable compatibility detection while minimizing the time lost to verification, as the comparison operation is quick and does not require complete system initialization.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If verification values are stored in memories, then measurement precision of compatibility is improved, but device complexity increases due to additional memory components

Engineering Contradiction:
Improvecompatibility verification accuracyVSAvoidmemory components
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent utilizes existing memory components in the management board and system board to store verification values, rather than introducing dedicated verification memory modules. These memories serve dual purposes: storing operational data for system function and storing verification values for compatibility checking. This multi-functionality approach improves compatibility verification precision without significantly increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20250390392A1Server system and circuit verification method
Publication Date: 2025.12.25 MITAC COMPUTING TECH
  • US20250390392A1 patent drawing
  • US20250390392A1 patent drawing
  • US20250390392A1 patent drawing

AI summary

A server system includes a management circuit and a processing circuit. The management circuit includes a first control circuit, a second control circuit and a first memory. The first control circuit includes a storage unit and firmware. The storage unit is configured to store a first list. The firmware includes a plurality of daemons. The second control circuit is coupled to the first control circuit. The first memory is coupled to the first control circuit. The first memory is configured to store a first verification value. The processing circuit is coupled to the management circuit. The processing circuit includes a second memory and a power control circuit. The second memory is coupled to the first control circuit. The second memory is configured to store a second verification value and processing circuit identification information. The power control circuit is coupled to the second control circuit and a power supply.